Home
last modified time | relevance | path

Searched refs:fvco (Results 1 – 25 of 25) sorted by relevance

/drivers/clk/samsung/
A Dclk-pll.c232 fvco *= mdiv; in samsung_pll35xx_recalc_rate()
345 fvco >>= 16; in samsung_pll36xx_recalc_rate()
463 fvco *= mdiv; in samsung_pll0822x_recalc_rate()
465 fvco *= 2; in samsung_pll0822x_recalc_rate()
561 fvco >>= 16; in samsung_pll0831x_recalc_rate()
657 fvco *= mdiv; in samsung_pll45xx_recalc_rate()
921 fvco *= mdiv; in samsung_pll6552_recalc_rate()
960 fvco >>= 16; in samsung_pll6553_recalc_rate()
997 fvco *= m; in samsung_pll2550x_recalc_rate()
1035 fvco *= mdiv; in samsung_pll2550xx_recalc_rate()
[all …]
/drivers/clk/sprd/
A Dpll.c156 u64 tmp, refin, fvco = rate; in _sprd_pll_set_rate() local
174 if (width && ((pll->fflag == 1 && fvco <= pll->fvco) || in _sprd_pll_set_rate()
175 (pll->fflag == 0 && fvco > pll->fvco))) in _sprd_pll_set_rate()
178 if (width && fvco <= pll->fvco) in _sprd_pll_set_rate()
179 fvco = fvco * 2; in _sprd_pll_set_rate()
191 nint = do_div(fvco, refin * CLK_PLL_1M); in _sprd_pll_set_rate()
202 tmp = fvco - refin * nint * CLK_PLL_1M; in _sprd_pll_set_rate()
208 ibias_val = pll_get_ibias(fvco, pll->itable); in _sprd_pll_set_rate()
A Dpll.h59 u64 fvco; member
76 .fvco = _fvco, \
/drivers/media/tuners/
A Dfc0011.c171 u32 fvco, xin, frac, xdiv, xdivr; in fc0011_set_params() local
190 fvco = freq * 64; in fc0011_set_params()
193 fvco = freq * 32; in fc0011_set_params()
196 fvco = freq * 16; in fc0011_set_params()
199 fvco = freq * 8; in fc0011_set_params()
202 fvco = freq * 4; in fc0011_set_params()
207 xdiv = fvco / 18000; in fc0011_set_params()
209 frac = fvco - xdiv * 18000; in fc0011_set_params()
222 if (fvco - xdiv * 18000 >= 9000) in fc0011_set_params()
260 if (fvco < 2320000) { in fc0011_set_params()
[all …]
A Dtda18250.c436 unsigned long fvco; in tda18250_pll_calc() local
447 fvco = lopd * scale * ((c->frequency / 1000) + dev->if_frequency); in tda18250_pll_calc()
453 *icp = (fvco < 6622000) ? 0x05 : 0x02; in tda18250_pll_calc()
459 *icp = (fvco < 6622000) ? 0x05 : 0x02; in tda18250_pll_calc()
462 if (fvco < 6643000) { in tda18250_pll_calc()
466 } else if (fvco < 6811000) { in tda18250_pll_calc()
479 *icp = (fvco < 6811000) ? 0x05 : 0x02; in tda18250_pll_calc()
487 lopd, scale, fvco, *rdiv, *ndiv, *icp); in tda18250_pll_calc()
/drivers/media/dvb-frontends/
A Dstv6111.c444 u32 p = 1, psel = 0, fvco, div, frac; in set_lof() local
459 fvco = frequency * p; in set_lof()
460 div = fvco / state->ref_freq; in set_lof()
461 frac = fvco % state->ref_freq; in set_lof()
465 if (fvco < 2700000) in set_lof()
467 else if (fvco < 2950000) in set_lof()
469 else if (fvco < 3300000) in set_lof()
471 else if (fvco < 3700000) in set_lof()
473 else if (fvco < 4200000) in set_lof()
475 else if (fvco < 4800000) in set_lof()
A Dstb6100.c301 u32 nint, nfrac, fvco; in stb6100_get_frequency() local
314 fvco = (nfrac * state->reference >> (9 - psd2)) + (nint * state->reference << psd2); in stb6100_get_frequency()
315 *frequency = state->frequency = fvco >> (odiv + 1); in stb6100_get_frequency()
319 state->frequency, odiv, psd2, state->reference, fvco, nint, nfrac); in stb6100_get_frequency()
331 u32 srate = 0, fvco, nint, nfrac; in stb6100_set_frequency() local
384 fvco = frequency << (1 + odiv); in stb6100_set_frequency()
386 nint = fvco / (state->reference << psd2); in stb6100_set_frequency()
388 nfrac = DIV_ROUND_CLOSEST((fvco - (nint * state->reference << psd2)) in stb6100_set_frequency()
437 ptr->reg, fvco, nint, nfrac); in stb6100_set_frequency()
A Dstv0910.c795 u32 fvco; in set_mclock() local
844 fvco = (quartz * 2 * ndiv) / idf; in set_mclock()
845 state->base->mclk = fvco / (2 * odf) * 1000000; in set_mclock()
/drivers/clk/imx/
A Dclk-fracn-gppll.c164 u64 fvco = parent_rate; in clk_fracn_gppll_recalc_rate() local
212 fvco = fvco * mfi; in clk_fracn_gppll_recalc_rate()
213 do_div(fvco, rdiv * odiv); in clk_fracn_gppll_recalc_rate()
216 fvco = fvco * mfi * mfd + fvco * mfn; in clk_fracn_gppll_recalc_rate()
217 do_div(fvco, mfd * rdiv * odiv); in clk_fracn_gppll_recalc_rate()
220 return (unsigned long)fvco; in clk_fracn_gppll_recalc_rate()
/drivers/gpu/drm/sprd/
A Dmegacores_pll.c44 pll->fvco = pll->potential_fvco; in dphy_calc_pll_param()
50 if (pll->fvco == 0) in dphy_calc_pll_param()
53 if (pll->fvco >= VCO_BAND_LOW && pll->fvco <= VCO_BAND_MID) { in dphy_calc_pll_param()
58 } else if (pll->fvco > VCO_BAND_MID && pll->fvco <= VCO_BAND_HIGH) { in dphy_calc_pll_param()
65 pll->nint = pll->fvco / pll->ref_clk; in dphy_calc_pll_param()
66 tmp = pll->fvco * factor * mhz; in dphy_calc_pll_param()
A Dsprd_dsi.h76 u32 fvco; member
/drivers/clk/
A Dclk-sp7021.c153 unsigned long fvco, nf; in plltv_integer_div() local
160 fvco = freq << r; in plltv_integer_div()
161 if (fvco <= FVCO_MAX) in plltv_integer_div()
167 nf = fvco * m_table[m]; in plltv_integer_div()
220 unsigned long fvco, nf, f, fout = 0; in plltv_fractional_div() local
227 fvco = freq << r; in plltv_fractional_div()
228 if (fvco <= FVCO_MAX) in plltv_fractional_div()
246 nf = fvco * m; in plltv_fractional_div()
A Dclk-xgene.c76 unsigned long fvco; in xgene_clk_pll_recalc_rate() local
91 fvco = parent_rate * (N_DIV_RD(pll) + 4); in xgene_clk_pll_recalc_rate()
102 fvco = fref * nfb; in xgene_clk_pll_recalc_rate()
110 fvco = parent_rate * SC_N_DIV_RD(pll); in xgene_clk_pll_recalc_rate()
113 clk_hw_get_name(hw), fvco / nout, parent_rate, in xgene_clk_pll_recalc_rate()
116 return fvco / nout; in xgene_clk_pll_recalc_rate()
A Dclk-axi-clkgen.c139 unsigned long f, dout, best_f, fvco; in axi_clkgen_calc_params() local
166 fvco = fin * m / d; in axi_clkgen_calc_params()
168 dout = DIV_ROUND_CLOSEST(fvco, fout); in axi_clkgen_calc_params()
170 f = fvco / dout; in axi_clkgen_calc_params()
/drivers/video/fbdev/matrox/
A Dmatroxfb_maven.c302 unsigned int fvco; in matroxfb_mavenclock() local
305 fvco = matroxfb_PLL_mavenclock(&maven1000_pll, ctl, htotal, vtotal, in, feed, &p, htotal2); in matroxfb_mavenclock()
306 if (!fvco) in matroxfb_mavenclock()
309 if (fvco <= 100000000) in matroxfb_mavenclock()
311 else if (fvco <= 140000000) in matroxfb_mavenclock()
313 else if (fvco <= 180000000) in matroxfb_mavenclock()
323 unsigned int fvco; in DAC1064_calcclock() local
326 fvco = matroxfb_PLL_calcclock(&maven_pll, freq, fmax, in, feed, &p); in DAC1064_calcclock()
328 if (fvco <= 100000) in DAC1064_calcclock()
330 else if (fvco <= 140000) in DAC1064_calcclock()
[all …]
A Dg450_pll.c22 static inline unsigned int g450_vco2f(unsigned char p, unsigned int fvco) { in g450_vco2f() argument
23 return (p & 0x40) ? fvco : fvco >> ((p & 3) + 1); in g450_vco2f()
59 unsigned int *fvco, unsigned int mnp) in g450_nextpll() argument
62 unsigned int tvco = *fvco; in g450_nextpll()
82 *fvco = tvco; in g450_nextpll()
A Dmatroxfb_misc.c165 unsigned int diff, fvco; in matroxfb_PLL_calcclock() local
173 fvco = (fxtal * (n + 1)) / (m + 1); in matroxfb_PLL_calcclock()
174 if (fvco < fwant) in matroxfb_PLL_calcclock()
175 diff = fwant - fvco; in matroxfb_PLL_calcclock()
177 diff = fvco - fwant; in matroxfb_PLL_calcclock()
183 bestvco = fvco; in matroxfb_PLL_calcclock()
A Dmatroxfb_Ti3026.c288 unsigned int fvco; in Ti3026_calcclock() local
293 fvco = PLL_calcclock(minfo, freq, fmax, &lin, &lfeed, &lpost); in Ti3026_calcclock()
294 fvco >>= (*post = lpost); in Ti3026_calcclock()
297 return fvco; in Ti3026_calcclock()
A Dmatroxfb_DAC1064.c43 unsigned int fvco; in DAC1064_calcclock() local
50 fvco = PLL_calcclock(minfo, freq, fmax, in, feed, &p); in DAC1064_calcclock()
53 if (fvco <= 100000) in DAC1064_calcclock()
55 else if (fvco <= 140000) in DAC1064_calcclock()
57 else if (fvco <= 180000) in DAC1064_calcclock()
/drivers/phy/freescale/
A Dphy-fsl-imx8-mipi-dphy.c387 unsigned long fvco; in mixel_dphy_configure_lvds_phy() local
418 fvco = data_rate * co; in mixel_dphy_configure_lvds_phy()
420 if (fvco >= MIN_VCO_FREQ) in mixel_dphy_configure_lvds_phy()
424 if (fvco < MIN_VCO_FREQ || fvco > MAX_VCO_FREQ) { in mixel_dphy_configure_lvds_phy()
425 dev_err(&phy->dev, "VCO frequency %lu is out of range\n", fvco); in mixel_dphy_configure_lvds_phy()
/drivers/phy/rockchip/
A Dphy-rockchip-samsung-dcphy.c1134 u64 fin, fvco, fout; in samsung_mipi_dcphy_pll_round_rate() local
1161 fvco = fout << _scaler; in samsung_mipi_dcphy_pll_round_rate()
1166 if (fvco < 2600 * MSEC_PER_SEC || fvco > 6600 * MSEC_PER_SEC) in samsung_mipi_dcphy_pll_round_rate()
1176 _fbdiv = DIV_ROUND_CLOSEST_ULL(fvco * _prediv, 2 * fin); in samsung_mipi_dcphy_pll_round_rate()
1183 _dsm = ((_prediv * fvco) - (2 * _fbdiv * fin)); in samsung_mipi_dcphy_pll_round_rate()
1191 delta = abs(fvco * MSEC_PER_SEC - tmp); in samsung_mipi_dcphy_pll_round_rate()
A Dphy-rockchip-samsung-hdptx.c906 unsigned int fvco, sdc; in rk_hdptx_phy_clk_pll_calc() local
916 fvco = fout * sdiv; in rk_hdptx_phy_clk_pll_calc()
918 if (fvco < 2000000 || fvco > 4000000) in rk_hdptx_phy_clk_pll_calc()
921 mdiv = DIV_ROUND_UP(fvco, fref); in rk_hdptx_phy_clk_pll_calc()
925 if (fref * mdiv - fvco) { in rk_hdptx_phy_clk_pll_calc()
933 rational_best_approximation(fref * mdiv - fvco, in rk_hdptx_phy_clk_pll_calc()
/drivers/mmc/host/
A Dsdhci-esdhc-mcf.c224 u32 fvco, fsys, fesdhc, temp; in esdhc_mcf_pltfm_set_clock() local
250 fvco = fsys * ((temp & 0x1f) + 1); in esdhc_mcf_pltfm_set_clock()
251 fesdhc = fvco / (((temp >> 10) & 0x1f) + 1); in esdhc_mcf_pltfm_set_clock()
/drivers/phy/st/
A Dphy-stm32-usbphyc.c207 unsigned long long fvco, ndiv, frac; in stm32_usbphyc_get_pll_params() local
219 fvco = (unsigned long long)PLL_FVCO_MHZ * HZ_PER_MHZ; in stm32_usbphyc_get_pll_params()
221 ndiv = fvco; in stm32_usbphyc_get_pll_params()
225 frac = fvco * (1 << 16); in stm32_usbphyc_get_pll_params()
/drivers/gpu/drm/renesas/rcar-du/
A Drcar_lvds.c217 unsigned long fvco; in rcar_lvds_d3_e3_pll_calc() local
228 fvco = fpfd * n; in rcar_lvds_d3_e3_pll_calc()
229 e_min = fvco > 1039500000 ? 1 : 0; in rcar_lvds_d3_e3_pll_calc()
241 fout = fvco / (1 << e) / div7; in rcar_lvds_d3_e3_pll_calc()

Completed in 91 milliseconds