Searched refs:g4x (Results 1 – 25 of 26) sorted by relevance
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248 else if (display->platform.g4x) in intel_set_memory_cxsr()249 display->wm.g4x.cxsr = enable; in intel_set_memory_cxsr()1203 raw = &crtc_state->wm.g4x.raw[level]; in _g4x_compute_pipe_wm()1211 raw = &crtc_state->wm.g4x.raw[level]; in _g4x_compute_pipe_wm()1449 crtc->wm.active.g4x = crtc_state->wm.g4x.intermediate; in g4x_initial_watermarks()1465 crtc->wm.active.g4x = crtc_state->wm.g4x.optimal; in g4x_optimize_watermarks()3873 &crtc_state->wm.g4x.raw[level]; in g4x_wm_sanitize()3890 crtc_state->wm.g4x.intermediate = in g4x_wm_sanitize()3891 crtc_state->wm.g4x.optimal; in g4x_wm_sanitize()3892 crtc->wm.active.g4x = crtc_state->wm.g4x.optimal; in g4x_wm_sanitize()[all …]
224 else if (DISPLAY_VER(display) >= 5 || display->platform.g4x) in intel_fbc_max_cfb_height()451 if (display->platform.g4x) in g4x_dpfc_ctl()796 if (DISPLAY_VER(display) >= 5 || display->platform.g4x) in intel_fbc_cfb_base_max()828 if (display->platform.g4x) in intel_fbc_max_limit()876 if (DISPLAY_VER(display) < 5 && !display->platform.g4x) { in intel_fbc_alloc_cfb()1027 else if (DISPLAY_VER(display) >= 5 || display->platform.g4x) in stride_is_valid()1066 if (display->platform.g4x) in g4x_fbc_pixel_format_is_valid()1096 else if (DISPLAY_VER(display) >= 5 || display->platform.g4x) in pixel_format_is_valid()1130 else if (DISPLAY_VER(display) >= 5 || display->platform.g4x) in rotation_is_valid()1148 } else if (DISPLAY_VER(display) >= 5 || display->platform.g4x) { in intel_fbc_max_surface_size()[all …]
144 if (display->platform.g4x) in g4x_hdmi_compute_config()610 if (!display->platform.g4x) in g4x_hdmi_connector_atomic_check()660 if (display->platform.g4x || display->platform.valleyview) in is_hdmi_port_valid()766 if (display->platform.g4x) in g4x_hdmi_init()
198 display->platform.g4x) in wm_latency_show()259 if (DISPLAY_VER(display) < 5 && !display->platform.g4x) in pri_wm_latency_open()
149 else if (DISPLAY_VER(display) >= 5 || display->platform.g4x) in i9xx_plane_has_windowing()168 if (display->platform.g4x || display->platform.ironlake || in i9xx_plane_ctl()1019 else if (DISPLAY_VER(display) >= 5 || display->platform.g4x) in intel_primary_plane_create()1040 if (DISPLAY_VER(display) >= 5 || display->platform.g4x) in intel_primary_plane_create()1076 if (DISPLAY_VER(display) >= 5 || display->platform.g4x) in intel_primary_plane_create()
142 if (display->platform.g4x || display->platform.valleyview || in intel_hpd_init_pins()423 if (display->platform.g4x || in i9xx_hpd_irq_ack()463 if (display->platform.g4x || in i9xx_hpd_irq_handler()478 if ((display->platform.g4x || in i9xx_hpd_irq_handler()1409 if (display->platform.g4x) in i915_hpd_irq_setup()
115 if (DISPLAY_VER(display) >= 5 || display->platform.g4x) in intel_crtc_max_vblank_count()356 display->platform.g4x) in intel_crtc_init()
403 if (DISPLAY_VER(display) < 5 && !display->platform.g4x) in i9xx_cursor_ctl_crtc()758 if (DISPLAY_VER(display) >= 5 || display->platform.g4x) in i9xx_cursor_get_hw_state()1054 if (DISPLAY_VER(display) >= 5 || display->platform.g4x) in intel_cursor_plane_create()
269 struct g4x_wm_values g4x; member
422 PLATFORM_GROUP(g4x),432 PLATFORM_GROUP(g4x),1778 } else if (DISPLAY_VER(display) >= 5 || display->platform.g4x) { in __intel_display_device_info_runtime_init()1905 DISPLAY_VER(display) < 5 && !display->platform.g4x) in intel_display_device_info_runtime_init()
68 if (display->platform.g4x) { in g4x_dp_set_clock()152 if (display->platform.g4x && pipe_config->limited_color_range) in intel_dp_prepare()387 if (display->platform.g4x && tmp & DP_COLOR_RANGE_16_235) in intel_dp_get_config()
26 func(g4x) /* g45 and gm45 */ \
2939 if (display->platform.g4x || display->platform.valleyview || in i9xx_set_pipeconf()3038 if (display->platform.g4x || display->platform.valleyview || in i9xx_get_pipe_config()4232 if (DISPLAY_VER(display) < 5 && !display->platform.g4x && in intel_crtc_atomic_check()4338 if (display->platform.g4x || display->platform.valleyview || in intel_display_max_pipe_bpp()4590 if (display->platform.g4x || in intel_crtc_prepare_cleared_state()5352 if (display->platform.g4x || DISPLAY_VER(display) >= 5) in intel_pipe_config_compare()7853 if (!found && display->platform.g4x) { in intel_setup_outputs()7859 if (!found && display->platform.g4x) in intel_setup_outputs()7872 if (display->platform.g4x) { in intel_setup_outputs()7877 if (display->platform.g4x) in intel_setup_outputs()[all …]
338 display->platform.g4x || DISPLAY_VER(display) == 2 || in i915_get_crtc_scanoutpos()
911 } g4x; member1431 struct g4x_wm_state g4x; member
948 if (ret || !display->platform.g4x) in intel_crt_get_modes()
1030 if (display->platform.g4x) { in i9xx_dpll()1804 else if (display->platform.g4x) in intel_dpll_init_clock_hook()
897 if (display->platform.g4x) in intel_audio_hooks_init()
1032 if (display->platform.g4x || !crtc_state->has_infoframe) in intel_hdmi_compute_gcp_infoframe()3006 } else if (display->platform.g4x) { in intel_infoframe_init()
99 else if (display->platform.i965gm || display->platform.g4x || in i915_sr_status()
1213 if (display->platform.g4x) in g4x_sprite_update_arm()
1612 if (display->platform.g4x && port_clock == 268800) in intel_dp_compute_rate()2747 if (display->platform.g4x) in intel_dp_port_has_audio()6436 if (!display->platform.g4x && port != PORT_A) in intel_dp_add_properties()
1129 if (display->platform.g4x) in i965_hz_to_pwm()
488 if (DISPLAY_VER(display) >= 5 || display->platform.g4x) in i9xx_pipe_crc_irq_handler()
730 CG_FUNCS(g4x);
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