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Searched refs:gb_addr_config_fields (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm_plane.c218 adev->gfx.config.gb_addr_config_fields.num_pipes; in amdgpu_dm_plane_fill_gfx9_tiling_info_from_device()
220 adev->gfx.config.gb_addr_config_fields.num_banks; in amdgpu_dm_plane_fill_gfx9_tiling_info_from_device()
222 adev->gfx.config.gb_addr_config_fields.pipe_interleave_size; in amdgpu_dm_plane_fill_gfx9_tiling_info_from_device()
224 adev->gfx.config.gb_addr_config_fields.num_se; in amdgpu_dm_plane_fill_gfx9_tiling_info_from_device()
226 adev->gfx.config.gb_addr_config_fields.max_compress_frags; in amdgpu_dm_plane_fill_gfx9_tiling_info_from_device()
228 adev->gfx.config.gb_addr_config_fields.num_rb_per_se; in amdgpu_dm_plane_fill_gfx9_tiling_info_from_device()
455 ilog2(adev->gfx.config.gb_addr_config_fields.num_se)); in amdgpu_dm_plane_add_gfx9_modifiers()
457 ilog2(adev->gfx.config.gb_addr_config_fields.num_banks)); in amdgpu_dm_plane_add_gfx9_modifiers()
458 int rb = ilog2(adev->gfx.config.gb_addr_config_fields.num_se) + in amdgpu_dm_plane_add_gfx9_modifiers()
459 ilog2(adev->gfx.config.gb_addr_config_fields.num_rb_per_se); in amdgpu_dm_plane_add_gfx9_modifiers()
[all …]
/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_display.c758 num_pkrs = adev->gfx.config.gb_addr_config_fields.num_pkrs; in convert_tiling_flags_to_modifier()
759 num_pipes = adev->gfx.config.gb_addr_config_fields.num_pipes; in convert_tiling_flags_to_modifier()
837 packers = ilog2(adev->gfx.config.gb_addr_config_fields.num_pkrs); in convert_tiling_flags_to_modifier()
842 ilog2(adev->gfx.config.gb_addr_config_fields.num_pkrs)); in convert_tiling_flags_to_modifier()
848 rb = ilog2(adev->gfx.config.gb_addr_config_fields.num_se) + in convert_tiling_flags_to_modifier()
849 ilog2(adev->gfx.config.gb_addr_config_fields.num_rb_per_se); in convert_tiling_flags_to_modifier()
851 ilog2(adev->gfx.config.gb_addr_config_fields.num_se)); in convert_tiling_flags_to_modifier()
853 ilog2(adev->gfx.config.gb_addr_config_fields.num_banks)); in convert_tiling_flags_to_modifier()
A Damdgpu_gfx.h259 struct gb_addr_config gb_addr_config_fields; member
A Dgfx_v9_4_3.c932 adev->gfx.config.gb_addr_config_fields.num_pipes = 1 << in gfx_v9_4_3_gpu_early_init()
939 adev->gfx.config.gb_addr_config_fields.num_pipes; in gfx_v9_4_3_gpu_early_init()
941 adev->gfx.config.gb_addr_config_fields.num_banks = 1 << in gfx_v9_4_3_gpu_early_init()
946 adev->gfx.config.gb_addr_config_fields.max_compress_frags = 1 << in gfx_v9_4_3_gpu_early_init()
951 adev->gfx.config.gb_addr_config_fields.num_rb_per_se = 1 << in gfx_v9_4_3_gpu_early_init()
956 adev->gfx.config.gb_addr_config_fields.num_se = 1 << in gfx_v9_4_3_gpu_early_init()
961 adev->gfx.config.gb_addr_config_fields.pipe_interleave_size = 1 << (8 + in gfx_v9_4_3_gpu_early_init()
A Dgfx_v12_0.c3542 adev->gfx.config.gb_addr_config_fields.num_pkrs = in get_gb_addr_config()
3547 adev->gfx.config.gb_addr_config_fields.num_pipes = 1 << in get_gb_addr_config()
3552 adev->gfx.config.gb_addr_config_fields.num_pipes; in get_gb_addr_config()
3554 adev->gfx.config.gb_addr_config_fields.max_compress_frags = 1 << in get_gb_addr_config()
3557 adev->gfx.config.gb_addr_config_fields.num_rb_per_se = 1 << in get_gb_addr_config()
3560 adev->gfx.config.gb_addr_config_fields.num_se = 1 << in get_gb_addr_config()
3563 adev->gfx.config.gb_addr_config_fields.pipe_interleave_size = 1 << (8 + in get_gb_addr_config()
A Dgfx_v11_0.c4680 adev->gfx.config.gb_addr_config_fields.num_pkrs = in get_gb_addr_config()
4685 adev->gfx.config.gb_addr_config_fields.num_pipes = 1 << in get_gb_addr_config()
4690 adev->gfx.config.gb_addr_config_fields.num_pipes; in get_gb_addr_config()
4692 adev->gfx.config.gb_addr_config_fields.max_compress_frags = 1 << in get_gb_addr_config()
4695 adev->gfx.config.gb_addr_config_fields.num_rb_per_se = 1 << in get_gb_addr_config()
4698 adev->gfx.config.gb_addr_config_fields.num_se = 1 << in get_gb_addr_config()
4701 adev->gfx.config.gb_addr_config_fields.pipe_interleave_size = 1 << (8 + in get_gb_addr_config()
A Dgfx_v9_0.c2115 adev->gfx.config.gb_addr_config_fields.num_pipes = 1 << in gfx_v9_0_gpu_early_init()
2122 adev->gfx.config.gb_addr_config_fields.num_pipes; in gfx_v9_0_gpu_early_init()
2124 adev->gfx.config.gb_addr_config_fields.num_banks = 1 << in gfx_v9_0_gpu_early_init()
2129 adev->gfx.config.gb_addr_config_fields.max_compress_frags = 1 << in gfx_v9_0_gpu_early_init()
2134 adev->gfx.config.gb_addr_config_fields.num_rb_per_se = 1 << in gfx_v9_0_gpu_early_init()
2139 adev->gfx.config.gb_addr_config_fields.num_se = 1 << in gfx_v9_0_gpu_early_init()
2144 adev->gfx.config.gb_addr_config_fields.pipe_interleave_size = 1 << (8 + in gfx_v9_0_gpu_early_init()
A Dgfx_v10_0.c4610 adev->gfx.config.gb_addr_config_fields.num_pkrs = in gfx_v10_0_gpu_early_init()
4629 adev->gfx.config.gb_addr_config_fields.num_pipes = 1 << in gfx_v10_0_gpu_early_init()
4634 adev->gfx.config.gb_addr_config_fields.num_pipes; in gfx_v10_0_gpu_early_init()
4636 adev->gfx.config.gb_addr_config_fields.max_compress_frags = 1 << in gfx_v10_0_gpu_early_init()
4639 adev->gfx.config.gb_addr_config_fields.num_rb_per_se = 1 << in gfx_v10_0_gpu_early_init()
4642 adev->gfx.config.gb_addr_config_fields.num_se = 1 << in gfx_v10_0_gpu_early_init()
4645 adev->gfx.config.gb_addr_config_fields.pipe_interleave_size = 1 << (8 + in gfx_v10_0_gpu_early_init()

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