Searched refs:gpfifo (Results 1 – 7 of 7) sorted by relevance
| /drivers/gpu/drm/nouveau/nvif/ |
| A D | chan.c | 14 if (chan->func->gpfifo.post) { in nvif_chan_gpfifo_push_kick()
24 chan->func->gpfifo.kick(chan); in nvif_chan_gpfifo_push_kick()
40 const u32 gpptr = (chan->gpfifo.cur + 1) & chan->gpfifo.max; in nvif_chan_gpfifo_post()
42 if (!chan->func->gpfifo.post) in nvif_chan_gpfifo_post()
64 if (chan->func->gpfifo.post) in nvif_chan_gpfifo_wait()
81 chan->gpfifo.free = chan->func->gpfifo.read_get(chan) - chan->gpfifo.cur - 1; in nvif_chan_gpfifo_wait()
82 if (chan->gpfifo.free < 0) in nvif_chan_gpfifo_wait()
83 chan->gpfifo.free += chan->gpfifo.max + 1; in nvif_chan_gpfifo_wait()
103 chan->gpfifo.map.ptr = gpfifo; in nvif_chan_gpfifo_ctor()
105 chan->gpfifo.free = chan->gpfifo.max; in nvif_chan_gpfifo_ctor()
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| A D | chan506f.c | 11 nvif_wr32(&chan->userd, 0x8c, chan->gpfifo.cur); in nvif_chan506f_gpfifo_kick()
17 u32 gpptr = chan->gpfifo.cur << 3; in nvif_chan506f_gpfifo_push()
19 if (WARN_ON(!chan->gpfifo.free)) in nvif_chan506f_gpfifo_push()
22 nvif_wr32(&chan->gpfifo, gpptr + 0, lower_32_bits(addr)); in nvif_chan506f_gpfifo_push()
23 nvif_wr32(&chan->gpfifo, gpptr + 4, upper_32_bits(addr) | in nvif_chan506f_gpfifo_push()
28 chan->gpfifo.cur = (chan->gpfifo.cur + 1) & chan->gpfifo.max; in nvif_chan506f_gpfifo_push()
29 chan->gpfifo.free--; in nvif_chan506f_gpfifo_push()
30 if (!chan->gpfifo.free) in nvif_chan506f_gpfifo_push()
60 .gpfifo.read_get = nvif_chan506f_gpfifo_read_get,
61 .gpfifo.push = nvif_chan506f_gpfifo_push,
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| A D | chan906f.c | 68 .gpfifo.read_get = nvif_chan906f_gpfifo_read_get,
69 .gpfifo.push = nvif_chan506f_gpfifo_push,
70 .gpfifo.kick = nvif_chan506f_gpfifo_kick,
71 .gpfifo.post = nvif_chan906f_gpfifo_post,
72 .gpfifo.post_size = NVIF_CHAN906F_SEM_RELEASE_SIZE,
77 nvif_chan906f_ctor_(const struct nvif_chan_func *func, void *userd, void *gpfifo, u32 gpfifo_size, in nvif_chan906f_ctor_() argument
81 nvif_chan_gpfifo_ctor(func, userd, gpfifo, gpfifo_size, push, push_addr, push_size, chan); in nvif_chan906f_ctor_()
88 nvif_chan906f_ctor(struct nvif_chan *chan, void *userd, void *gpfifo, u32 gpfifo_size, in nvif_chan906f_ctor() argument
91 return nvif_chan906f_ctor_(&nvif_chan906f, userd, gpfifo, gpfifo_size, in nvif_chan906f_ctor()
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| A D | chanc36f.c | 16 nvif_wr32(&chan->userd, 0x8c, chan->gpfifo.cur); in nvif_chanc36f_gpfifo_kick()
54 .gpfifo.read_get = nvif_chan906f_gpfifo_read_get,
55 .gpfifo.push = nvif_chan506f_gpfifo_push,
56 .gpfifo.kick = nvif_chanc36f_gpfifo_kick,
57 .gpfifo.post = nvif_chan906f_gpfifo_post,
58 .gpfifo.post_size = NVIF_CHANC36F_SEM_RELEASE_SIZE,
63 nvif_chanc36f_ctor(struct nvif_chan *chan, void *userd, void *gpfifo, u32 gpfifo_size, in nvif_chanc36f_ctor() argument
69 ret = nvif_chan906f_ctor_(&nvif_chanc36f, userd, gpfifo, gpfifo_size, in nvif_chanc36f_ctor()
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| /drivers/gpu/drm/nouveau/include/nvif/ |
| A D | chan.h | 22 } gpfifo; member
38 } gpfifo; member
53 void nvif_chan_gpfifo_ctor(const struct nvif_chan_func *, void *userd, void *gpfifo, u32 gpfifo_siz…
62 int nvif_chan906f_ctor_(const struct nvif_chan_func *, void *userd, void *gpfifo, u32 gpfifo_size,
69 int nvif_chan506f_ctor(struct nvif_chan *, void *userd, void *gpfifo, u32 gpfifo_size,
71 int nvif_chan906f_ctor(struct nvif_chan *, void *userd, void *gpfifo, u32 gpfifo_size,
73 int nvif_chanc36f_ctor(struct nvif_chan *, void *userd, void *gpfifo, u32 gpfifo_size,
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| /drivers/gpu/drm/nouveau/ |
| A D | nouveau_exec.c | 385 push_max = nouveau_exec_push_max_from_ib_max(chan->chan.gpfifo.max); in nouveau_exec_ioctl_exec()
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| A D | nouveau_abi16.c | 419 chan->chan->chan.gpfifo.max); in nouveau_abi16_ioctl_channel_alloc()
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