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Searched refs:gpu_cc_pll0 (Results 1 – 16 of 16) sorted by relevance

/drivers/clk/qcom/
A Dgpucc-qcm2290.c58 static struct clk_alpha_pll gpu_cc_pll0 = { variable
84 { .hw = &gpu_cc_pll0.clkr.hw, },
99 { .hw = &gpu_cc_pll0.clkr.hw, },
100 { .hw = &gpu_cc_pll0.clkr.hw, },
101 { .hw = &gpu_cc_pll0.clkr.hw, },
331 [GPU_CC_PLL0] = &gpu_cc_pll0.clkr,
397 clk_huayra_2290_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config); in gpu_cc_qcm2290_probe()
A Dgpucc-qcs615.c66 static struct clk_alpha_pll gpu_cc_pll0 = { variable
123 .hw = &gpu_cc_pll0.clkr.hw,
156 { .hw = &gpu_cc_pll0.clkr.hw },
173 { .hw = &gpu_cc_pll0.clkr.hw },
439 [GPU_CC_PLL0] = &gpu_cc_pll0.clkr,
458 &gpu_cc_pll0,
A Dgpucc-milos.c61 static struct clk_alpha_pll gpu_cc_pll0 = { variable
94 &gpu_cc_pll0.clkr.hw,
125 { .hw = &gpu_cc_pll0.clkr.hw },
127 { .hw = &gpu_cc_pll0.clkr.hw },
480 [GPU_CC_PLL0] = &gpu_cc_pll0.clkr,
500 &gpu_cc_pll0,
A Dgpucc-sm6350.c62 static struct clk_alpha_pll gpu_cc_pll0 = { variable
86 &gpu_cc_pll0.clkr.hw,
134 { .hw = &gpu_cc_pll0.clkr.hw },
152 { .hw = &gpu_cc_pll0.clkr.hw },
461 [GPU_CC_PLL0] = &gpu_cc_pll0.clkr,
503 clk_fabia_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config); in gpu_cc_sm6350_probe()
A Dgpucc-sm6115.c64 static struct clk_alpha_pll gpu_cc_pll0 = { variable
97 &gpu_cc_pll0.clkr.hw,
170 { .hw = &gpu_cc_pll0.clkr.hw },
432 [GPU_CC_PLL0] = &gpu_cc_pll0.clkr,
481 clk_alpha_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config); in gpu_cc_sm6115_probe()
A Dgpucc-sc8280xp.c59 static struct clk_alpha_pll gpu_cc_pll0 = { variable
113 { .hw = &gpu_cc_pll0.clkr.hw },
379 [GPU_CC_PLL0] = &gpu_cc_pll0.clkr,
446 clk_lucid_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config); in gpu_cc_sc8280xp_probe()
A Dgpucc-sm4450.c57 static struct clk_alpha_pll gpu_cc_pll0 = { variable
124 { .hw = &gpu_cc_pll0.clkr.hw },
141 { .hw = &gpu_cc_pll0.clkr.hw },
142 { .hw = &gpu_cc_pll0.clkr.hw },
724 [GPU_CC_PLL0] = &gpu_cc_pll0.clkr,
782 clk_lucid_evo_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config); in gpu_cc_sm4450_probe()
A Dgpucc-sm8450.c67 static struct clk_alpha_pll gpu_cc_pll0 = { variable
147 { .hw = &gpu_cc_pll0.clkr.hw },
723 [GPU_CC_PLL0] = &gpu_cc_pll0.clkr,
782 gpu_cc_pll0.regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_LUCID_OLE]; in gpu_cc_sm8450_probe()
787 clk_lucid_ole_pll_configure(&gpu_cc_pll0, regmap, &sm8475_gpu_cc_pll0_config); in gpu_cc_sm8450_probe()
790 clk_lucid_evo_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config); in gpu_cc_sm8450_probe()
A Dgpucc-sar2130p.c57 static struct clk_alpha_pll gpu_cc_pll0 = { variable
128 { .hw = &gpu_cc_pll0.clkr.hw },
435 [GPU_CC_PLL0] = &gpu_cc_pll0.clkr,
484 clk_lucid_ole_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config); in gpu_cc_sar2130p_probe()
A Dgpucc-x1p42100.c60 static struct clk_alpha_pll gpu_cc_pll0 = { variable
131 { .hw = &gpu_cc_pll0.clkr.hw },
496 [GPU_CC_PLL0] = &gpu_cc_pll0.clkr,
561 clk_lucid_ole_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config); in gpu_cc_x1p42100_probe()
A Dgpucc-sm8350.c59 static struct clk_alpha_pll gpu_cc_pll0 = { variable
113 { .hw = &gpu_cc_pll0.clkr.hw },
556 [GPU_CC_PLL0] = &gpu_cc_pll0.clkr,
605 clk_lucid_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config); in gpu_cc_sm8350_probe()
A Dgpucc-sm8550.c55 static struct clk_alpha_pll gpu_cc_pll0 = { variable
125 { .hw = &gpu_cc_pll0.clkr.hw },
520 [GPU_CC_PLL0] = &gpu_cc_pll0.clkr,
575 clk_lucid_ole_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config); in gpu_cc_sm8550_probe()
A Dgpucc-sa8775p.c58 static struct clk_alpha_pll gpu_cc_pll0 = { variable
121 { .hw = &gpu_cc_pll0.clkr.hw },
556 [GPU_CC_PLL0] = &gpu_cc_pll0.clkr,
646 clk_lucid_evo_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config); in gpu_cc_sa8775p_probe()
A Dgpucc-sm8650.c58 static struct clk_alpha_pll gpu_cc_pll0 = { variable
128 { .hw = &gpu_cc_pll0.clkr.hw },
593 [GPU_CC_PLL0] = &gpu_cc_pll0.clkr,
647 clk_lucid_ole_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config); in gpu_cc_sm8650_probe()
A Dgpucc-x1e80100.c57 static struct clk_alpha_pll gpu_cc_pll0 = { variable
127 { .hw = &gpu_cc_pll0.clkr.hw },
581 [GPU_CC_PLL0] = &gpu_cc_pll0.clkr,
637 clk_zonda_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config); in gpu_cc_x1e80100_probe()
A Dgpucc-sc7280.c35 static struct clk_alpha_pll gpu_cc_pll0 = { variable
91 { .hw = &gpu_cc_pll0.clkr.hw },
431 [GPU_CC_PLL0] = &gpu_cc_pll0.clkr,

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