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Searched refs:gpuvm_max_page_table_levels (Results 1 – 20 of 20) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dml/dcn31/
A Ddcn31_fpu.c58 .gpuvm_max_page_table_levels = 1,
202 .gpuvm_max_page_table_levels = 1,
301 .gpuvm_max_page_table_levels = 1,
/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/
A Ddml_top_display_cfg_types.h437 unsigned int gpuvm_max_page_table_levels; member
/drivers/gpu/drm/amd/display/dc/dml2/
A Ddml2_translation_helper.c51 out->gpuvm_max_page_table_levels = 4; in dml2_init_ip_params()
127 out->gpuvm_max_page_table_levels = 1; in dml2_init_ip_params()
189 out->gpuvm_max_page_table_levels = 4; in dml2_init_ip_params()
632 out->gpuvm_max_page_table_levels = in_ip_params->gpuvm_max_page_table_levels; in dml2_translate_ip_params()
1306 dml_dispcfg->plane.GPUVMMaxPageTableLevels = dml2->v20.dml_core_ctx.ip.gpuvm_max_page_table_levels; in map_dc_state_into_dml_display_cfg()
A Ddisplay_mode_core_structs.h395 dml_uint_t gpuvm_max_page_table_levels; member
/drivers/gpu/drm/amd/display/dc/dml/dcn302/
A Ddcn302_fpu.c40 .gpuvm_max_page_table_levels = 4,
/drivers/gpu/drm/amd/display/dc/dml/
A Ddisplay_mode_structs.h267 unsigned int gpuvm_max_page_table_levels; member
A Ddisplay_mode_vba.c489 mode_lib->vba.GPUVMMaxPageTableLevels = ip->gpuvm_max_page_table_levels; in fetch_ip_params()
/drivers/gpu/drm/amd/display/dc/dml/dcn303/
A Ddcn303_fpu.c39 .gpuvm_max_page_table_levels = 4,
/drivers/gpu/drm/amd/display/dc/dml/dcn314/
A Ddcn314_fpu.c39 .gpuvm_max_page_table_levels = 1,
/drivers/gpu/drm/amd/display/dc/dml/dcn301/
A Ddcn301_fpu.c42 .gpuvm_max_page_table_levels = 1,
/drivers/gpu/drm/amd/display/dc/dml/dcn351/
A Ddcn351_fpu.c20 .gpuvm_max_page_table_levels = 1,
/drivers/gpu/drm/amd/display/dc/dml/dcn35/
A Ddcn35_fpu.c41 .gpuvm_max_page_table_levels = 1,
/drivers/gpu/drm/amd/display/dc/dml/dcn20/
A Ddcn20_fpu.c89 .gpuvm_max_page_table_levels = 4,
156 .gpuvm_max_page_table_levels = 4,
558 .gpuvm_max_page_table_levels = 1,
/drivers/gpu/drm/amd/display/dc/dml/dcn30/
A Ddcn30_fpu.c53 .gpuvm_max_page_table_levels = 4,
A Ddisplay_rq_dlg_calc_30.c1425 unsigned int levels = mode_lib->ip.gpuvm_max_page_table_levels; in dml_rq_dlg_get_dlg_params()
/drivers/gpu/drm/amd/display/dc/dml/dcn321/
A Ddcn321_fpu.c38 .gpuvm_max_page_table_levels = 4,
/drivers/gpu/drm/amd/display/dc/resource/dcn201/
A Ddcn201_resource.c79 .gpuvm_max_page_table_levels = 4,
/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
A Ddml2_core_dcn4_calcs.c2971 …late_vm_and_row_bytes_params.GPUVMMaxPageTableLevels = p->display_cfg->gpuvm_max_page_table_levels; in CalculateVMRowAndSwath()
5144 …OSE("DML::%s: GPUVMPageTableLevels = %u\n", __func__, p->display_cfg->gpuvm_max_page_table_levels); in CalculatePrefetchSchedule()
5264 …OSE("DML::%s: GPUVMPageTableLevels = %u\n", __func__, p->display_cfg->gpuvm_max_page_table_levels); in CalculatePrefetchSchedule()
5292 if (p->display_cfg->gpuvm_max_page_table_levels >= 3) { in CalculatePrefetchSchedule()
5294 …} else if (p->display_cfg->gpuvm_max_page_table_levels == 1 && !dcc_mrq_enable && !p->setup_for_td… in CalculatePrefetchSchedule()
5303 if (p->mrq_present || p->display_cfg->gpuvm_max_page_table_levels >= 3) in CalculatePrefetchSchedule()
5318 …extra_tdpe_bytes = (unsigned int)math_max2(0, (p->display_cfg->gpuvm_max_page_table_levels - 1) * … in CalculatePrefetchSchedule()
9948 if (display_cfg->gpuvm_max_page_table_levels >= 2) { in CalculateVMGroupAndRequestTimes()
9969 if (display_cfg->gpuvm_max_page_table_levels >= 2) in CalculateVMGroupAndRequestTimes()
9973 if (display_cfg->gpuvm_max_page_table_levels >= 2) { in CalculateVMGroupAndRequestTimes()
[all …]
/drivers/gpu/drm/amd/display/dc/dml2/dml21/
A Ddml21_translation_helper.c1083 dml_dispcfg->gpuvm_max_page_table_levels = 4; in dml21_map_dc_state_into_dml_display_cfg()
/drivers/gpu/drm/amd/display/dc/dml/dcn32/
A Ddcn32_fpu.c59 .gpuvm_max_page_table_levels = 4,

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