| /drivers/media/platform/verisilicon/ |
| A D | rockchip_vpu981_hw_av1_dec.c | 821 hantro_reg_write(vpu, &av1_segment_e, in rockchip_vpu981_av1_dec_set_segmentation()
899 hantro_reg_write(vpu, &av1_quant_seg0, in rockchip_vpu981_av1_dec_set_segmentation()
911 hantro_reg_write(vpu, &av1_skip_seg0, in rockchip_vpu981_av1_dec_set_segmentation()
916 hantro_reg_write(vpu, &av1_quant_seg1, in rockchip_vpu981_av1_dec_set_segmentation()
928 hantro_reg_write(vpu, &av1_skip_seg1, in rockchip_vpu981_av1_dec_set_segmentation()
945 hantro_reg_write(vpu, &av1_skip_seg2, in rockchip_vpu981_av1_dec_set_segmentation()
962 hantro_reg_write(vpu, &av1_skip_seg3, in rockchip_vpu981_av1_dec_set_segmentation()
979 hantro_reg_write(vpu, &av1_skip_seg4, in rockchip_vpu981_av1_dec_set_segmentation()
996 hantro_reg_write(vpu, &av1_skip_seg5, in rockchip_vpu981_av1_dec_set_segmentation()
1013 hantro_reg_write(vpu, &av1_skip_seg6, in rockchip_vpu981_av1_dec_set_segmentation()
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| A D | hantro_g2_hevc_dec.c | 181 hantro_reg_write(vpu, &g2_pic_width_4x4, in set_params()
196 hantro_reg_write(vpu, &g2_tempor_mvp_e, in set_params()
201 hantro_reg_write(vpu, &g2_asym_pred_e, in set_params()
203 hantro_reg_write(vpu, &g2_sao_e, in set_params()
209 hantro_reg_write(vpu, &g2_cu_qpd_e, 1); in set_params()
212 hantro_reg_write(vpu, &g2_cu_qpd_e, 0); in set_params()
230 hantro_reg_write(vpu, &g2_list_mod_e, in set_params()
236 hantro_reg_write(vpu, &g2_idr_pic_e, in set_params()
240 hantro_reg_write(vpu, &g2_pcm_filt_d, in set_params()
242 hantro_reg_write(vpu, &g2_pcm_e, in set_params()
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| A D | hantro_g2_vp9_dec.c | 134 hantro_reg_write(ctx->dev, &g2_out_dis, 0); in config_output()
228 hantro_reg_write(ctx->dev, &vp9_last_sign_bias, in config_ref_registers()
231 hantro_reg_write(ctx->dev, &vp9_gref_sign_bias, in config_ref_registers()
234 hantro_reg_write(ctx->dev, &vp9_aref_sign_bias, in config_ref_registers()
335 hantro_reg_write(ctx->dev, &g2_tile_e, 1); in config_tiles()
342 hantro_reg_write(ctx->dev, &g2_tile_e, 0); in config_tiles()
409 hantro_reg_write(ctx->dev, &vp9_segment_upd_e, in config_segment()
504 hantro_reg_write(ctx->dev, &g2_pix_shift, 0); in config_bit_depth()
563 hantro_reg_write(ctx->dev, &g2_tempor_mvp_e, in config_others()
572 hantro_reg_write(ctx->dev, &g2_write_mvs_e, in config_others()
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| A D | rockchip_vpu2_hw_vp8_dec.c | 295 hantro_reg_write(vpu, &vp8_dec_lf_level[i], in cfg_lf()
306 hantro_reg_write(vpu, &vp8_dec_mb_adj[i], in cfg_lf()
308 hantro_reg_write(vpu, &vp8_dec_ref_adj[i], in cfg_lf()
329 hantro_reg_write(vpu, &vp8_dec_quant[i], quant); in cfg_qp()
333 hantro_reg_write(vpu, &vp8_dec_quant[i], in cfg_qp()
402 hantro_reg_write(vpu, &vp8_dec_num_dct_partitions, in cfg_parts()
413 hantro_reg_write(vpu, &vp8_dec_dct_base[i], in cfg_parts()
416 hantro_reg_write(vpu, &vp8_dec_dct_start_bits[i], in cfg_parts()
439 hantro_reg_write(vpu, in cfg_tap()
562 hantro_reg_write(vpu, &vp8_dec_skip_mode, 1); in rockchip_vpu2_vp8_dec_run()
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| A D | hantro_g1_vp8_dec.c | 154 hantro_reg_write(vpu, &vp8_dec_lf_level[i], in cfg_lf()
165 hantro_reg_write(vpu, &vp8_dec_mb_adj[i], in cfg_lf()
167 hantro_reg_write(vpu, &vp8_dec_ref_adj[i], in cfg_lf()
191 hantro_reg_write(vpu, &vp8_dec_quant[i], quant); in cfg_qp()
195 hantro_reg_write(vpu, &vp8_dec_quant[i], in cfg_qp()
276 hantro_reg_write(vpu, ®, mb_start_bits); in cfg_parts()
282 hantro_reg_write(vpu, ®, mb_size + 1); in cfg_parts()
315 hantro_reg_write(vpu, &vp8_dec_dct_base[i], in cfg_parts()
318 hantro_reg_write(vpu, &vp8_dec_dct_start_bits[i], in cfg_parts()
348 hantro_reg_write(vpu, &vp8_dec_pred_bc_tap[i][j], in cfg_tap()
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| A D | hantro_postproc.c | 19 hantro_reg_write(vpu, \
135 hantro_reg_write(vpu, &g2_down_scale_e, 1); in hantro_postproc_g2_enable()
136 hantro_reg_write(vpu, &g2_down_scale_y, down_scale >> 2); in hantro_postproc_g2_enable()
137 hantro_reg_write(vpu, &g2_down_scale_x, down_scale >> 2); in hantro_postproc_g2_enable()
152 hantro_reg_write(ctx->dev, &g2_rs_out_bit_depth, out_depth); in hantro_postproc_g2_enable()
153 hantro_reg_write(ctx->dev, &g2_pp_pix_shift, pp_shift); in hantro_postproc_g2_enable()
155 hantro_reg_write(vpu, &g2_output_8_bits, out_depth > 8 ? 0 : 1); in hantro_postproc_g2_enable()
156 hantro_reg_write(vpu, &g2_output_format, out_depth > 8 ? 1 : 0); in hantro_postproc_g2_enable()
158 hantro_reg_write(vpu, &g2_out_rs_e, 1); in hantro_postproc_g2_enable()
305 hantro_reg_write(vpu, &g2_out_rs_e, 0); in hantro_postproc_g2_disable()
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| A D | hantro.h | 452 static __always_inline void hantro_reg_write(struct hantro_dev *vpu, in hantro_reg_write() function
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