Searched refs:has_sel_update (Results 1 – 5 of 5) sorted by relevance
759 if (crtc_state->has_sel_update) in _panel_replay_enable_sink()781 if (crtc_state->has_sel_update) { in _psr_enable_sink()1664 !crtc_state->has_sel_update); in intel_psr_needs_wa_18037818876()1715 crtc_state->has_sel_update = intel_sel_update_config_valid(intel_dp, crtc_state); in intel_psr_compute_config()1773 pipe_config->has_sel_update = intel_dp->psr.sel_update_enabled; in intel_psr_get_config()2015 intel_dp->psr.sel_update_enabled = crtc_state->has_sel_update; in intel_psr_enable_locked()2402 crtc_state->has_sel_update)) in intel_psr_min_vblank_delay()2404 else if (DISPLAY_VER(display) < 30 && (crtc_state->has_sel_update || in intel_psr_min_vblank_delay()2943 new_crtc_state->has_sel_update != psr->sel_update_enabled || in intel_psr_pre_plane_update()4268 return intel_dp_is_edp(intel_dp) && (crtc_state->has_sel_update || in intel_psr_needs_alpm()
250 str_enabled_disabled(pipe_config->has_sel_update), in intel_crtc_state_dump()
1119 bool has_sel_update; member
1498 if (DISPLAY_VER(display) >= 12 && crtc_state->has_sel_update) { in intel_fbc_check_plane()
2899 } else if (crtc_state->has_sel_update) { in intel_dp_compute_vsc_sdp()
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