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Searched refs:hdmi_read (Results 1 – 14 of 14) sorted by relevance

/drivers/gpu/drm/msm/hdmi/
A Dhdmi_hdcp.c325 hdmi_read(hdmi, REG_HDMI_DDC_SW_STATUS)); in msm_reset_hdcp_ddc_failures()
327 reg_val = hdmi_read(hdmi, REG_HDMI_DDC_CTRL); in msm_reset_hdcp_ddc_failures()
350 hdmi_read(hdmi, REG_HDMI_DDC_SW_STATUS)); in msm_reset_hdcp_ddc_failures()
412 reg_val = hdmi_read(hdmi, REG_HDMI_HPD_CTRL); in msm_hdmi_hdcp_reauth_work()
434 reg_val = hdmi_read(hdmi, REG_HDMI_HPD_CTRL); in msm_hdmi_hdcp_reauth_work()
475 reg_val = hdmi_read(hdmi, REG_HDMI_CTRL); in msm_hdmi_hdcp_auth_prepare()
505 hdmi_read(hdmi, REG_HDMI_HDCP_DEBUG_CTRL)); in msm_hdmi_hdcp_auth_prepare()
546 reg_val = hdmi_read(hdmi, REG_HDMI_CTRL); in msm_hdmi_hdcp_auth_fail()
573 reg_val = hdmi_read(hdmi, REG_HDMI_CTRL); in msm_hdmi_hdcp_auth_done()
1318 reg_val = hdmi_read(hdmi, REG_HDMI_CTRL); in msm_hdmi_hdcp_on()
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A Dhdmi_i2c.c53 ddc_int_ctrl = hdmi_read(hdmi, REG_HDMI_DDC_INT_CTRL); in ddc_clear_irq()
76 ddc_int_ctrl = hdmi_read(hdmi, REG_HDMI_DDC_INT_CTRL); in sw_done()
105 WARN_ON(!(hdmi_read(hdmi, REG_HDMI_CTRL) & HDMI_CTRL_ENABLE)); in msm_hdmi_i2c_xfer()
173 hdmi_read(hdmi, REG_HDMI_DDC_SW_STATUS), in msm_hdmi_i2c_xfer()
174 hdmi_read(hdmi, REG_HDMI_DDC_HW_STATUS), in msm_hdmi_i2c_xfer()
175 hdmi_read(hdmi, REG_HDMI_DDC_INT_CTRL)); in msm_hdmi_i2c_xfer()
179 ddc_status = hdmi_read(hdmi, REG_HDMI_DDC_SW_STATUS); in msm_hdmi_i2c_xfer()
201 hdmi_read(hdmi, REG_HDMI_DDC_DATA); in msm_hdmi_i2c_xfer()
204 ddc_data = hdmi_read(hdmi, REG_HDMI_DDC_DATA); in msm_hdmi_i2c_xfer()
A Dhdmi_bridge.c83 val = hdmi_read(hdmi, REG_HDMI_INFOFRAME_CTRL1); in msm_hdmi_config_avi_infoframe()
88 val = hdmi_read(hdmi, REG_HDMI_INFOFRAME_CTRL1); in msm_hdmi_config_avi_infoframe()
119 val = hdmi_read(hdmi, REG_HDMI_INFOFRAME_CTRL1); in msm_hdmi_config_audio_infoframe()
153 val = hdmi_read(hdmi, REG_HDMI_GEN_PKT_CTRL); in msm_hdmi_config_spd_infoframe()
187 val = hdmi_read(hdmi, REG_HDMI_GEN_PKT_CTRL); in msm_hdmi_config_hdmi_infoframe()
206 val = hdmi_read(hdmi, REG_HDMI_INFOFRAME_CTRL0); in msm_hdmi_bridge_clear_infoframe()
211 val = hdmi_read(hdmi, REG_HDMI_INFOFRAME_CTRL1); in msm_hdmi_bridge_clear_infoframe()
218 val = hdmi_read(hdmi, REG_HDMI_INFOFRAME_CTRL0); in msm_hdmi_bridge_clear_infoframe()
232 val = hdmi_read(hdmi, REG_HDMI_GEN_PKT_CTRL); in msm_hdmi_bridge_clear_infoframe()
241 val = hdmi_read(hdmi, REG_HDMI_GEN_PKT_CTRL); in msm_hdmi_bridge_clear_infoframe()
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A Dhdmi_hpd.c18 val = hdmi_read(hdmi, REG_HDMI_PHY_CTRL); in msm_hdmi_phy_reset()
96 hpd_ctrl = hdmi_read(hdmi, REG_HDMI_HPD_CTRL); in msm_hdmi_hpd_enable()
131 hpd_int_status = hdmi_read(hdmi, REG_HDMI_HPD_INT_STATUS); in msm_hdmi_hpd_irq()
132 hpd_int_ctrl = hdmi_read(hdmi, REG_HDMI_HPD_INT_CTRL); in msm_hdmi_hpd_irq()
163 hpd_int_status = hdmi_read(hdmi, REG_HDMI_HPD_INT_STATUS); in detect_reg()
A Dhdmi_audio.c37 acr_pkt_ctrl = hdmi_read(hdmi, REG_HDMI_ACR_PKT_CTRL); in msm_hdmi_audio_update()
38 vbi_pkt_ctrl = hdmi_read(hdmi, REG_HDMI_VBI_PKT_CTRL); in msm_hdmi_audio_update()
39 aud_pkt_ctrl = hdmi_read(hdmi, REG_HDMI_AUDIO_PKT_CTRL1); in msm_hdmi_audio_update()
40 audio_config = hdmi_read(hdmi, REG_HDMI_AUDIO_CFG); in msm_hdmi_audio_update()
A Dhdmi.h110 static inline u32 hdmi_read(struct hdmi *hdmi, u32 reg) in hdmi_read() function
/drivers/media/i2c/
A Dadv7842.c1559 bt->width = (hdmi_read(sd, 0x07) & 0x0f) * 256 + hdmi_read(sd, 0x08); in adv7842_query_dv_timings()
1560 bt->height = (hdmi_read(sd, 0x09) & 0x0f) * 256 + hdmi_read(sd, 0x0a); in adv7842_query_dv_timings()
1561 freq = ((hdmi_read(sd, 0x51) << 1) + (hdmi_read(sd, 0x52) >> 7)) * 1000000; in adv7842_query_dv_timings()
1569 hdmi_read(sd, 0x21); in adv7842_query_dv_timings()
1571 hdmi_read(sd, 0x23); in adv7842_query_dv_timings()
1573 hdmi_read(sd, 0x25); in adv7842_query_dv_timings()
1575 hdmi_read(sd, 0x2b)) / 2; in adv7842_query_dv_timings()
1577 hdmi_read(sd, 0x2f)) / 2; in adv7842_query_dv_timings()
1579 hdmi_read(sd, 0x33)) / 2; in adv7842_query_dv_timings()
1584 hdmi_read(sd, 0x0c); in adv7842_query_dv_timings()
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A Dadv7604.c561 return ((hdmi_read(sd, reg) << 8) | hdmi_read(sd, reg + 1)) & mask; in hdmi_read16()
1298 return hdmi_read(sd, 0x05) & 0x80; in is_hdmi()
1458 polarity = hdmi_read(sd, 0x05); in read_stdi()
1526 a = hdmi_read(sd, 0x06); in adv7604_read_hdmi_pixelclock()
1527 b = hdmi_read(sd, 0x3b); in adv7604_read_hdmi_pixelclock()
1538 a = hdmi_read(sd, 0x51); in adv7611_read_hdmi_pixelclock()
1539 b = hdmi_read(sd, 0x52); in adv7611_read_hdmi_pixelclock()
2672 (hdmi_read(sd, 0x5c) << 8) + in adv76xx_log_status()
2673 (hdmi_read(sd, 0x5d) & 0xf0)); in adv76xx_log_status()
2675 (hdmi_read(sd, 0x5e) << 8) + in adv76xx_log_status()
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/drivers/gpu/drm/sti/
A Dsti_hdmi.c241 hdmi_read(hdmi, HDMI_INT_STA); in hdmi_irq()
336 val = hdmi_read(hdmi, HDMI_SW_DI_CFG); in hdmi_infoframe_reset()
403 val = hdmi_read(hdmi, HDMI_SW_DI_CFG); in hdmi_infoframe_write_infopack()
428 val = hdmi_read(hdmi, HDMI_SW_DI_CFG); in hdmi_infoframe_write_infopack()
506 val = hdmi_read(hdmi, HDMI_SW_DI_CFG); in hdmi_audio_infoframe_config()
580 val = hdmi_read(hdmi, HDMI_CFG); in hdmi_swreset()
597 val = hdmi_read(hdmi, HDMI_CFG); in hdmi_swreset()
608 hdmi_read(hdmi, reg))
682 hdmi_dbg_cfg(s, hdmi_read(hdmi, HDMI_CFG)); in hdmi_dbg_show()
685 hdmi_dbg_sta(s, hdmi_read(hdmi, HDMI_STA)); in hdmi_dbg_show()
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A Dsti_hdmi_tx3g4c28phy.c126 if ((hdmi_read(hdmi, HDMI_STA) & HDMI_STA_DLL_LCK) == 0) { in sti_hdmi_tx3g4c28phy_start()
206 if (hdmi_read(hdmi, HDMI_STA) & HDMI_STA_DLL_LCK) in sti_hdmi_tx3g4c28phy_stop()
A Dsti_hdmi.h93 u32 hdmi_read(struct sti_hdmi *hdmi, int offset);
/drivers/media/i2c/adv748x/
A Dadv748x-hdmi.c120 val = hdmi_read(state, ADV748X_HDMI_LW1); in adv748x_hdmi_has_signal()
129 a = hdmi_read(state, ADV748X_HDMI_TMDS_1); in adv748x_hdmi_read_pixelclock()
130 b = hdmi_read(state, ADV748X_HDMI_TMDS_2); in adv748x_hdmi_read_pixelclock()
306 bt->interlaced = hdmi_read(state, ADV748X_HDMI_F1H1) & in adv748x_hdmi_query_dv_timings()
326 polarity = hdmi_read(state, 0x05); in adv748x_hdmi_query_dv_timings()
A Dadv748x.h398 #define hdmi_read(s, r) adv748x_read(s, ADV748X_PAGE_HDMI, r) macro
399 #define hdmi_read16(s, r, m) (((hdmi_read(s, r) << 8) | hdmi_read(s, (r)+1)) & (m))
/drivers/gpu/drm/bridge/synopsys/
A Ddw-hdmi-i2s-audio.c30 static inline u8 hdmi_read(struct dw_hdmi_i2s_audio_data *audio, int offset) in hdmi_read() function

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