Searched refs:hs_exit (Results 1 – 15 of 15) sorted by relevance
| /drivers/gpu/drm/msm/dsi/phy/ |
| A D | dsi_phy.c | 108 timing->hs_exit = linear_inter(tmax, tmin, pcnt2, 0, true); in msm_dsi_dphy_timing_calc()
111 temp = ((timing->hs_exit >> 1) + 1) * 2 * ui; in msm_dsi_dphy_timing_calc()
138 timing->clk_trail, timing->clk_prepare, timing->hs_exit, in msm_dsi_dphy_timing_calc()
218 timing->hs_exit = linear_inter(tmax, tmin, pcnt2, 0, false); in msm_dsi_dphy_timing_calc_v2()
252 timing->clk_trail, timing->clk_prepare, timing->hs_exit, in msm_dsi_dphy_timing_calc_v2()
326 timing->hs_exit = linear_inter(tmax, tmin, pcnt2, 0, false); in msm_dsi_dphy_timing_calc_v3()
362 timing->clk_trail, timing->clk_prepare, timing->hs_exit, in msm_dsi_dphy_timing_calc_v3()
439 timing->hs_exit = linear_inter(tmax, tmin, pcnt_hs_exit, 0, false); in msm_dsi_dphy_timing_calc_v4()
463 timing->clk_zero, timing->clk_trail, timing->clk_prepare, timing->hs_exit, in msm_dsi_dphy_timing_calc_v4()
497 timing->hs_exit = linear_inter(tmax, tmin, 10, 0, false); in msm_dsi_cphy_timing_calc_v4()
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| A D | dsi_phy.h | 72 u32 hs_exit; member
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| A D | dsi_phy_20nm.c | 24 writel(DSI_20nm_PHY_TIMING_CTRL_4_HS_EXIT(timing->hs_exit), in dsi_20nm_dphy_set_timing()
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| A D | dsi_phy_7nm.c | 1097 writel(timing->hs_exit, base + REG_DSI_7nm_PHY_CMN_TIMING_CTRL_4); in dsi_7nm_phy_enable()
1112 writel(timing->hs_exit, base + REG_DSI_7nm_PHY_CMN_TIMING_CTRL_4); in dsi_7nm_phy_enable()
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| A D | dsi_phy_28nm_8960.c | 480 writel(DSI_28nm_8960_PHY_TIMING_CTRL_4_HS_EXIT(timing->hs_exit), in dsi_28nm_dphy_set_timing()
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| A D | dsi_phy_10nm.c | 849 writel(timing->hs_exit, base + REG_DSI_10nm_PHY_CMN_TIMING_CTRL_4); in dsi_10nm_phy_enable()
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| A D | dsi_phy_28nm.c | 733 writel(DSI_28nm_PHY_TIMING_CTRL_4_HS_EXIT(timing->hs_exit), in dsi_28nm_dphy_set_timing()
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| A D | dsi_phy_14nm.c | 924 writel(DSI_14nm_PHY_LN_TIMING_CTRL_4_HS_EXIT(timing->hs_exit), in dsi_14nm_dphy_set_timing()
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| /drivers/phy/ |
| A D | phy-core-mipi-dphy.c | 49 cfg->hs_exit = 100000; in phy_mipi_dphy_calc_config()
147 if (cfg->hs_exit < 100000) in phy_mipi_dphy_config_validate()
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| /drivers/phy/rockchip/ |
| A D | phy-rockchip-inno-dsidphy.c | 372 u32 hs_exit, clk_post, clk_pre, wakeup, lpx, ta_go, ta_sure, ta_wait; in inno_dsidphy_mipi_mode_enable() local
425 hs_exit = DIV_ROUND_UP(cfg->hs_exit, t_txbyteclkhs); in inno_dsidphy_mipi_mode_enable()
499 T_HS_EXIT_CNT_HI(hs_exit >> 5)); in inno_dsidphy_mipi_mode_enable()
501 T_HS_EXIT_CNT_LO(hs_exit)); in inno_dsidphy_mipi_mode_enable()
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| A D | phy-rockchip-samsung-dcphy.c | 327 u8 hs_exit; member
1254 val = T_HS_EXIT(timing->hs_exit) | T_CLK_TRAIL(timing->clk_trail_eot); in samsung_mipi_dphy_clk_lane_timing_init()
1321 val = T_HS_EXIT(timing->hs_exit) | T_HS_TRAIL(timing->hs_trail_eot); in samsung_mipi_dphy_data_lane_timing_init()
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| /drivers/phy/amlogic/ |
| A D | phy-meson-axg-mipi-dphy.c | 257 DIV_ROUND_UP(priv->config.hs_exit, temp) | in phy_meson_axg_mipi_dphy_power_on()
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| /drivers/gpu/drm/bridge/ |
| A D | samsung-dsim.c | 755 int hs_exit, hs_prepare, hs_zero, hs_trail; in samsung_dsim_set_phy_ctrl() local
781 hs_exit = PS_TO_CYCLE(cfg.hs_exit, byte_clock); in samsung_dsim_set_phy_ctrl()
802 reg = DSIM_PHYTIMING_LPX(lpx) | DSIM_PHYTIMING_HS_EXIT(hs_exit); in samsung_dsim_set_phy_ctrl()
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| A D | nwl-dsi.c | 240 cycles = ps2bc(dsi, cfg->hs_exit); in nwl_dsi_config_host()
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| /drivers/gpu/drm/rockchip/ |
| A D | dw-mipi-dsi2-rockchip.c | 198 tmp = cfg->hs_trail + cfg->hs_exit; in dw_mipi_dsi2_phy_get_timing()
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Completed in 37 milliseconds