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Searched refs:hwseq (Results 1 – 25 of 40) sorted by relevance

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/drivers/gpu/drm/amd/display/dc/hwss/dcn201/
A Ddcn201_hwseq.c91 addr->quad_part < hwseq->fb_top.quad_part) { in gpu_addr_to_uma()
92 addr->quad_part -= hwseq->fb_base.quad_part; in gpu_addr_to_uma()
93 addr->quad_part += hwseq->fb_offset.quad_part; in gpu_addr_to_uma()
112 gpu_addr_to_uma(hwseq, &addr->grph.addr); in plane_address_in_gpu_space_to_uma()
113 gpu_addr_to_uma(hwseq, &addr->grph.meta_addr); in plane_address_in_gpu_space_to_uma()
138 struct dce_hwseq *hws = dc->hwseq; in dcn201_update_plane_addr()
168 struct dce_hwseq *hws = dc->hwseq; in dcn201_init_blank()
227 struct dce_hwseq *hws = dc->hwseq; in dcn201_init_hw()
379 struct dce_hwseq *hws = dc->hwseq; in dcn201_plane_atomic_disconnect()
530 struct dce_hwseq *hws = dc->hwseq; in dcn201_pipe_control_lock()
[all …]
A Ddcn201_init.c135 dc->hwseq->funcs = dcn201_private_funcs; in dcn201_hw_sequencer_construct()
/drivers/gpu/drm/amd/display/dc/hwss/dcn303/
A Ddcn303_init.c36 dc->hwseq->funcs.dpp_pg_control = dcn303_dpp_pg_control; in dcn303_hw_sequencer_construct()
37 dc->hwseq->funcs.hubp_pg_control = dcn303_hubp_pg_control; in dcn303_hw_sequencer_construct()
38 dc->hwseq->funcs.dsc_pg_control = dcn303_dsc_pg_control; in dcn303_hw_sequencer_construct()
39 dc->hwseq->funcs.enable_power_gating_plane = dcn303_enable_power_gating_plane; in dcn303_hw_sequencer_construct()
/drivers/gpu/drm/amd/display/dc/hwss/dcn302/
A Ddcn302_init.c38 dc->hwseq->funcs.dpp_pg_control = dcn302_dpp_pg_control; in dcn302_hw_sequencer_construct()
39 dc->hwseq->funcs.hubp_pg_control = dcn302_hubp_pg_control; in dcn302_hw_sequencer_construct()
40 dc->hwseq->funcs.dsc_pg_control = dcn302_dsc_pg_control; in dcn302_hw_sequencer_construct()
/drivers/gpu/drm/amd/display/dc/hwss/dcn35/
A Ddcn35_hwseq.c78 struct dce_hwseq *hws = dc->hwseq;
133 struct dce_hwseq *hws = dc->hwseq; in dcn35_init_hw()
613 dc->hwseq->funcs.power_down && in dcn35_power_down_on_boot()
616 dc->hwseq->funcs.power_down(dc); in dcn35_power_down_on_boot()
624 dc->hwseq->funcs.power_down) { in dcn35_power_down_on_boot()
1394 dc->hwseq->funcs.dpp_root_clock_control(dc->hwseq, i, power_on); in dcn35_root_clock_control()
1398 dc->hwseq->funcs.dpstream_root_clock_control(dc->hwseq, i, power_on); in dcn35_root_clock_control()
1404 dc->hwseq->funcs.physymclk_root_clock_control(dc->hwseq, i, power_on); in dcn35_root_clock_control()
1424 dc->hwseq->funcs.dpp_root_clock_control(dc->hwseq, i, power_on); in dcn35_root_clock_control()
1428 dc->hwseq->funcs.dpstream_root_clock_control(dc->hwseq, i, power_on); in dcn35_root_clock_control()
[all …]
/drivers/gpu/drm/amd/display/dc/hwss/dcn31/
A Ddcn31_hwseq.c72 struct dce_hwseq *hws = dc->hwseq; in enable_memory_low_power()
112 struct dce_hwseq *hws = dc->hwseq; in dcn31_init_hw()
125 hws->funcs.disable_vga(dc->hwseq); in dcn31_init_hw()
182 hws->funcs.enable_power_gating_plane(dc->hwseq, true); in dcn31_init_hw()
529 if (dc->hwseq) in dcn31_reset_back_end_for_pipe()
530 dc->hwseq->wa_state.skip_blank_stream = false; in dcn31_reset_back_end_for_pipe()
535 if (dc->hwseq) in dcn31_reset_back_end_for_pipe()
536 dc->hwseq->wa_state.skip_blank_stream = true; in dcn31_reset_back_end_for_pipe()
592 if (dc->hwseq) in dcn31_reset_back_end_for_pipe()
593 dc->hwseq->wa_state.skip_blank_stream = false; in dcn31_reset_back_end_for_pipe()
[all …]
A Ddcn31_init.c155 dc->hwseq->funcs = dcn31_private_funcs; in dcn31_hw_sequencer_construct()
/drivers/gpu/drm/amd/display/dc/core/
A Ddc_vm_helper.c43 num_vmids = dc->hwss.init_sys_ctx(dc->hwseq, dc, pa_config); in dc_setup_system_context()
59 dc->hwss.init_vm_ctx(dc->hwseq, dc, va_config, vmid); in dc_setup_vm_context()
/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
A Ddcn20_hwseq.c409 struct dce_hwseq *hws = dc->hwseq; in dcn20_init_blank()
704 struct dce_hwseq *hws = dc->hwseq; in dcn20_plane_atomic_disable()
828 struct dce_hwseq *hws = dc->hwseq; in dcn20_enable_stream_timing()
1111 struct dce_hwseq *hws = dc->hwseq; in dcn20_set_input_transfer_func()
1676 struct dce_hwseq *hws = dc->hwseq; in dcn20_update_dchubp_dpp()
1924 struct dce_hwseq *hws = dc->hwseq; in dcn20_program_pipe()
2045 struct dce_hwseq *hws = dc->hwseq; in dcn20_program_front_end_for_ctx()
2221 is_dsc_ungated = dc->hwseq->funcs.dsc_pg_status(dc->hwseq, dsc->inst); in dcn20_post_unlock_reset_opp()
2245 struct dce_hwseq *hwseq = dc->hwseq; in dcn20_post_unlock_program_front_end() local
2329 if (!hwseq) in dcn20_post_unlock_program_front_end()
[all …]
A Ddcn20_init.c144 dc->hwseq->funcs = dcn20_private_funcs; in dcn20_hw_sequencer_construct()
/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
A Ddcn10_hwseq.c255 struct dce_hwseq *hws = dc->hwseq; in log_mpc_crc()
1000 struct dce_hwseq *hws = dc->hwseq; in undo_DEGVIDCN10_253_wa()
1020 struct dce_hwseq *hws = dc->hwseq; in apply_DEGVIDCN10_253_wa()
1050 struct dce_hwseq *hws = dc->hwseq; in dcn10_bios_golden_init()
1409 struct dce_hwseq *hws = dc->hwseq; in dcn10_plane_atomic_disconnect()
1456 struct dce_hwseq *hws = dc->hwseq; in dcn10_plane_atomic_power_down()
1487 struct dce_hwseq *hws = dc->hwseq; in dcn10_plane_atomic_disable()
1883 dc->hwseq->funcs.power_down && in dcn10_power_down_on_boot()
1886 dc->hwseq->funcs.power_down(dc); in dcn10_power_down_on_boot()
3276 if (dc->hwseq->wa.DEGVIDCN10_254) in dcn10_post_unlock_program_front_end()
[all …]
A Ddcn10_init.c126 dc->hwseq->funcs = dcn10_private_funcs; in dcn10_hw_sequencer_construct()
/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
A Ddcn401_hwseq.c135 struct dce_hwseq *hws = dc->hwseq; in dcn401_init_hw()
751 struct dce_hwseq *hws = dc->hwseq; in dcn401_enable_stream_timing()
1879 struct dce_hwseq *hws = dc->hwseq; in dcn401_reset_hw_ctx_wrap()
1962 struct dce_hwseq *hws = dc->hwseq; in dcn401_program_pipe()
2082 struct dce_hwseq *hws = dc->hwseq; in dcn401_program_front_end_for_ctx()
2248 struct dce_hwseq *hwseq = dc->hwseq; in dcn401_post_unlock_program_front_end() local
2335 if (!hwseq) in dcn401_post_unlock_program_front_end()
2345 if (hwseq->funcs.update_force_pstate) in dcn401_post_unlock_program_front_end()
2355 if (hwseq->wa.DEGVIDCN21) in dcn401_post_unlock_program_front_end()
2381 struct dce_hwseq *hws = dc->hwseq; in dcn401_update_bandwidth()
[all …]
/drivers/gpu/drm/amd/display/dc/hwss/dcn32/
A Ddcn32_hwseq.c525 struct dce_hwseq *hws = dc->hwseq; in dcn32_set_input_transfer_func()
722 struct dce_hwseq *hws = dc->hwseq; in dcn32_program_mall_pipe_config()
779 struct dce_hwseq *hws = dc->hwseq; in dcn32_init_hw()
796 hws->funcs.disable_vga(dc->hwseq); in dcn32_init_hw()
1186 struct dce_hwseq *hws = stream->ctx->dc->hwseq; in dcn32_calculate_dccg_k1_k2_values()
1224 struct dce_hwseq *hws = dc->hwseq; in dcn32_calculate_pix_rate_divider()
1306 struct dce_hwseq *hws = link->dc->hwseq; in dcn32_unblank_stream()
1515 struct dce_hwseq *hws = dc->hwseq; in dcn32_update_dsc_pg()
1536 struct dce_hwseq *hws = dc->hwseq; in dcn32_disable_phantom_streams()
1571 struct dce_hwseq *hws = dc->hwseq; in dcn32_enable_phantom_streams()
[all …]
/drivers/gpu/drm/amd/display/dc/hwss/dce60/
A Ddce60_hwseq.c278 struct dce_hwseq *hws = dc->hwseq; in dce60_program_front_end_for_pipe()
286 dce_enable_fe_clock(dc->hwseq, mi->inst, true); in dce60_program_front_end_for_pipe()
425 dc->hwseq->funcs.enable_display_power_gating = dce100_enable_display_power_gating; in dce60_hw_sequencer_construct()
/drivers/gpu/drm/amd/display/dc/hwss/dce80/
A Ddce80_hwseq.c49 dc->hwseq->funcs.enable_display_power_gating = dce100_enable_display_power_gating; in dce80_hw_sequencer_construct()
/drivers/gpu/drm/amd/display/dc/hwss/dce110/
A Ddce110_hwseq.c1206 struct dce_hwseq *hws = link->dc->hwseq; in dce110_unblank_stream()
1224 struct dce_hwseq *hws = link->dc->hwseq; in dce110_blank_stream()
1593 struct dce_hwseq *hws = dc->hwseq; in dce110_apply_single_controller_ctx_to_hw()
1907 struct dce_hwseq *hws = dc->hwseq; in dce110_enable_accelerated_mode()
2448 struct dce_hwseq *hws = dc->hwseq; in dce110_apply_ctx_to_hw()
2481 dce_crtc_switch_to_clk_src(dc->hwseq, in dce110_apply_ctx_to_hw()
2497 dc->hwseq->funcs.setup_hpo_hw_control(dc->hwseq, is_hpo_acquired); in dce110_apply_ctx_to_hw()
2808 struct dce_hwseq *hws = dc->hwseq; in dce110_init_hw()
2917 struct dce_hwseq *hws = dc->hwseq; in dce110_program_front_end_for_pipe()
3067 struct dce_hwseq *hws = dc->hwseq; in dce110_power_down_fe()
[all …]
/drivers/gpu/drm/amd/display/dc/hwss/dce112/
A Ddce112_hwseq.c158 dc->hwseq->funcs.enable_display_power_gating = dce112_enable_display_power_gating; in dce112_hw_sequencer_construct()
/drivers/gpu/drm/amd/display/dc/hwss/dce100/
A Ddce100_hwseq.c138 dc->hwseq->funcs.enable_display_power_gating = dce100_enable_display_power_gating; in dce100_hw_sequencer_construct()
/drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/
A Ddce120_clk_mgr.c149 if (dce121_xgmi_enabled(ctx->dc->hwseq)) in dce121_clk_mgr_construct()
/drivers/gpu/drm/amd/display/dc/hwss/dcn301/
A Ddcn301_init.c151 dc->hwseq->funcs = dcn301_private_funcs; in dcn301_hw_sequencer_construct()
/drivers/gpu/drm/amd/display/dc/hwss/dcn21/
A Ddcn21_init.c149 dc->hwseq->funcs = dcn21_private_funcs; in dcn21_hw_sequencer_construct()
/drivers/gpu/drm/amd/display/dc/hwss/dce120/
A Ddce120_hwseq.c266 dc->hwseq->funcs.enable_display_power_gating = dce120_enable_display_power_gating; in dce120_hw_sequencer_construct()
/drivers/gpu/drm/amd/display/dc/hwss/dcn30/
A Ddcn30_init.c153 dc->hwseq->funcs = dcn30_private_funcs; in dcn30_hw_sequencer_construct()
/drivers/gpu/drm/amd/display/dc/hwss/dcn314/
A Ddcn314_init.c161 dc->hwseq->funcs = dcn314_private_funcs; in dcn314_hw_sequencer_construct()

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