Home
last modified time | relevance | path

Searched refs:i (Results 1 – 25 of 5612) sorted by relevance

12345678910>>...225

/drivers/gpu/drm/xe/
A Dxe_ring_ops.c254 i = emit_copy_timestamp(lrc, dw, i); in __emit_job_gen12_simple()
269 i = emit_flush_dw(dw, i); in __emit_job_gen12_simple()
277 i = emit_user_interrupt(dw, i); in __emit_job_gen12_simple()
307 i = emit_copy_timestamp(lrc, dw, i); in __emit_job_gen12_video()
332 i = emit_flush_dw(dw, i); in __emit_job_gen12_video()
340 i = emit_user_interrupt(dw, i); in __emit_job_gen12_video()
389 i = emit_user_interrupt(dw, i); in __emit_job_gen12_render_compute()
424 i = emit_user_interrupt(dw, i); in emit_migration_job_gen12()
452 for (i = 0; i < job->q->width; ++i) in emit_job_gen12_copy()
463 for (i = 0; i < job->q->width; ++i) in emit_job_gen12_video()
[all …]
/drivers/gpu/drm/nouveau/
A Dnouveau_reg.h40 #define NV10_PFB_TILE(i) (0x00100240 + (i*16)) argument
42 #define NV10_PFB_TLIMIT(i) (0x00100244 + (i*16)) argument
43 #define NV10_PFB_TSIZE(i) (0x00100248 + (i*16)) argument
44 #define NV10_PFB_TSTATUS(i) (0x0010024c + (i*16)) argument
49 #define NV20_PFB_ZCOMP(i) (0x00100300 + 4*(i)) argument
55 #define NV04_PFB_SCRAMBLE(i) (0x00100400 + 4 * (i)) argument
56 #define NV40_PFB_TILE(i) (0x00100600 + (i*16)) argument
59 #define NV40_PFB_TLIMIT(i) (0x00100604 + (i*16)) argument
60 #define NV40_PFB_TSIZE(i) (0x00100608 + (i*16)) argument
61 #define NV40_PFB_TSTATUS(i) (0x0010060c + (i*16)) argument
[all …]
/drivers/clk/hisilicon/
A Dclk.c97 for (i = 0; i < nums; i++) { in hisi_clk_register_fixed_rate()
127 for (i = 0; i < nums; i++) { in hisi_clk_register_fixed_factor()
130 clks[i].flags, clks[i].mult, in hisi_clk_register_fixed_factor()
157 for (i = 0; i < nums; i++) { in hisi_clk_register_mux()
162 clks[i].num_parents, clks[i].flags, in hisi_clk_register_mux()
196 for (i = 0; i < nums; i++) { in hisi_clk_register_phase()
219 for (i = 0; i < nums; i++) { in hisi_clk_register_divider()
224 clks[i].shift, clks[i].width, in hisi_clk_register_divider()
257 for (i = 0; i < nums; i++) { in hisi_clk_register_gate()
294 for (i = 0; i < nums; i++) { in hisi_clk_register_gate_sep()
[all …]
/drivers/gpu/drm/amd/display/dc/basics/
A Dcalcs_logger.h382 for (i = 0; i < maximum_number_of_surfaces; i++) { in print_bw_calcs_data()
391 i, data->scatter_gather_enable_for_pipe[i]); in print_bw_calcs_data()
393 i, data->interlace_mode[i]); in print_bw_calcs_data()
395 i, data->display_pstate_change_enable[i]); in print_bw_calcs_data()
399 i, data->max_chunks_non_fbc_mode[i]); in print_bw_calcs_data()
404 i, data->output_bppdp4_lane_hbr2[i]); in print_bw_calcs_data()
406 i, data->output_bppdp4_lane_hbr3[i]); in print_bw_calcs_data()
459 i, bw_fixed_to_int(data->lb_partitions[i])); in print_bw_calcs_data()
536 for (i = 0; i < maximum_number_of_surfaces; i++) { in print_bw_calcs_data()
549 for (i = 0; i < 3; i++) { in print_bw_calcs_data()
[all …]
/drivers/clk/mmp/
A Dclk.c30 int i; in mmp_register_fixed_rate_clks() local
33 for (i = 0; i < size; i++) { in mmp_register_fixed_rate_clks()
53 int i; in mmp_register_fixed_factor_clks() local
55 for (i = 0; i < size; i++) { in mmp_register_fixed_factor_clks()
58 clks[i].flags, clks[i].mult, in mmp_register_fixed_factor_clks()
75 int i; in mmp_register_general_gate_clks() local
77 for (i = 0; i < size; i++) { in mmp_register_general_gate_clks()
101 int i; in mmp_register_gate_clks() local
103 for (i = 0; i < size; i++) { in mmp_register_gate_clks()
131 for (i = 0; i < size; i++) { in mmp_register_mux_clks()
[all …]
/drivers/base/regmap/
A Dregmap-kunit.c40 for (i = 0; i < size; i++) in get_changed_bytes()
41 while (n[i] == o[i]) in get_changed_bytes()
281 for (i = 0; i < BLOCK_TEST_SIZE; i++) in bulk_write()
287 for (i = 0; i < BLOCK_TEST_SIZE; i++) in bulk_write()
309 for (i = 0; i < BLOCK_TEST_SIZE; i++) in bulk_read()
316 for (i = 0; i < BLOCK_TEST_SIZE; i++) in bulk_read()
349 for (i = 0; i < BLOCK_TEST_SIZE; i++) in multi_write()
355 for (i = 0; i < BLOCK_TEST_SIZE; i++) in multi_write()
379 regs[i] = i; in multi_read()
387 for (i = 0; i < BLOCK_TEST_SIZE; i++) in multi_read()
[all …]
/drivers/isdn/mISDN/
A Ddsp_audio.c77 int i; in alaw2linear() local
84 i = (i + 0x100) << (seg - 1); in alaw2linear()
144 for (i = 0; i < 256; i++) in dsp_audio_generate_law_tables()
147 for (i = 0; i < 256; i++) in dsp_audio_generate_law_tables()
150 for (i = 0; i < 256; i++) { in dsp_audio_generate_law_tables()
165 for (i = -32768; i < 32768; i++) { in dsp_audio_generate_s2law_table()
171 for (i = -32768; i < 32768; i++) { in dsp_audio_generate_s2law_table()
198 for (i = 0; i < 256; i++) { in dsp_audio_generate_seven()
209 for (i = 0; i < 256; i++) { in dsp_audio_generate_seven()
222 for (i = 0; i < 128; i++) { in dsp_audio_generate_seven()
[all …]
/drivers/net/wireless/ath/ath9k/
A Deeprom.c65 for (i = 0; i < listSize - 1; i++) { in ath9k_hw_get_lower_upper_index()
192 for (i = 0; i < size; i++) in ath9k_hw_nvram_swap_data()
214 for (i = 0; i < size; i++) in ath9k_hw_nvram_validate_checksum()
248 for (i = 0; i <= (pwrMax - pwrMin) / 2; i++) { in ath9k_hw_fill_vpd_table()
313 for (i = 0; i < numRates; i++) { in ath9k_hw_get_legacy_target_powers()
368 for (i = 0; i < numRates; i++) { in ath9k_hw_get_target_powers()
505 for (i = 0; i < numXpdGains; i++) { in ath9k_hw_get_gain_boundaries_pdadcs()
515 for (i = 0; i < numXpdGains; i++) { in ath9k_hw_get_gain_boundaries_pdadcs()
525 for (i = 0; i < numXpdGains; i++) { in ath9k_hw_get_gain_boundaries_pdadcs()
536 for (i = 0; i < numXpdGains; i++) { in ath9k_hw_get_gain_boundaries_pdadcs()
[all …]
/drivers/media/platform/allegro-dvt/
A Dallegro-mail.c57 dst[i++] = 0; in allegro_enc_init()
121 dst[i++] = val; in allegro_encode_config_blob()
127 dst[i++] = val; in allegro_encode_config_blob()
133 dst[i++] = val; in allegro_encode_config_blob()
139 dst[i++] = val; in allegro_encode_config_blob()
186 dst[i++] = 0; in allegro_encode_config_blob()
199 dst[i++] = 0; in allegro_encode_config_blob()
331 dst[i++] = 0; in allegro_enc_encode_frame()
332 dst[i++] = 0; in allegro_enc_encode_frame()
333 dst[i++] = 0; in allegro_enc_encode_frame()
[all …]
/drivers/net/ethernet/intel/ixgbe/
A Dixgbe_dcb_82599.c41 for (i = 0; i < MAX_USER_PRIORITY; i++) in ixgbe_dcb_config_rx_arbiter_82599()
46 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) { in ixgbe_dcb_config_rx_arbiter_82599()
89 for (i = 0; i < 128; i++) { in ixgbe_dcb_config_tx_desc_arbiter_82599()
95 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) { in ixgbe_dcb_config_tx_desc_arbiter_82599()
152 for (i = 0; i < MAX_USER_PRIORITY; i++) in ixgbe_dcb_config_tx_data_arbiter_82599()
157 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) { in ixgbe_dcb_config_tx_data_arbiter_82599()
217 for (i = 0; i < MAX_USER_PRIORITY; i++) { in ixgbe_dcb_config_pfc_82599()
224 for (i = 0; i <= max_tc; i++) { in ixgbe_dcb_config_pfc_82599()
259 for (i = 0; i < (MAX_TRAFFIC_CLASS / 2); i++) in ixgbe_dcb_config_pfc_82599()
286 for (i = 0; i < 32; i++) { in ixgbe_dcb_config_tc_stats_82599()
[all …]
/drivers/gpu/drm/i915/display/
A Di9xx_display_sr.c17 int i; in i9xx_display_save_swf() local
21 for (i = 0; i < 7; i++) { in i9xx_display_save_swf()
25 for (i = 0; i < 3; i++) in i9xx_display_save_swf()
28 for (i = 0; i < 7; i++) in i9xx_display_save_swf()
31 for (i = 0; i < 16; i++) { in i9xx_display_save_swf()
35 for (i = 0; i < 3; i++) in i9xx_display_save_swf()
46 for (i = 0; i < 7; i++) { in i9xx_display_restore_swf()
50 for (i = 0; i < 3; i++) in i9xx_display_restore_swf()
53 for (i = 0; i < 7; i++) in i9xx_display_restore_swf()
56 for (i = 0; i < 16; i++) { in i9xx_display_restore_swf()
[all …]
/drivers/gpu/drm/amd/display/dc/core/
A Ddc_link_enc_cfg.c101 for (i = 0; i < MAX_PIPES; i++) { in remove_link_enc_assignment()
237 for (i = 0; i < MAX_PIPES; i++) { in get_link_enc_used_by_link()
253 for (i = 0; i < MAX_PIPES; i++) { in clear_enc_assignments()
303 for (i = 0; i < MAX_PIPES; i++) in link_enc_cfg_link_encs_assign()
399 for (i = 0; i < MAX_PIPES; i++) { in link_enc_cfg_link_encs_assign()
405 for (i = 0; i < MAX_PIPES; i++) { in link_enc_cfg_link_encs_assign()
418 for (i = 0; i < MAX_PIPES; i++) { in link_enc_cfg_link_encs_assign()
469 for (i = 0; i < MAX_PIPES; i++) { in link_enc_cfg_get_stream_using_link_enc()
508 for (i = 0; i < MAX_PIPES; i++) { in link_enc_cfg_get_link_enc_used_by_link()
532 for (i = 0; i < MAX_PIPES; i++) { in link_enc_cfg_get_next_avail_link_enc()
[all …]
A Ddc_state.c151 for (i = 0; i < MAX_PIPES; i++) { in dc_state_copy_internal()
306 for (i = 0; i < state->stream_count; i++) { in dc_state_destruct()
421 for (i = 0; i < state->stream_count; i++) in dc_state_remove_stream()
457 for (i = 0; i < status->plane_count; i++) in remove_mpc_combine_for_stream()
614 for (i = 0; i < old_plane_count; i++) in dc_state_rem_all_planes_for_stream()
617 for (i = 0; i < old_plane_count; i++) in dc_state_rem_all_planes_for_stream()
634 for (i = 0; i < plane_count; i++) in dc_state_add_all_planes_for_stream()
893 for (i = 0; i < old_plane_count; i++) in dc_state_rem_all_phantom_planes_for_stream()
896 for (i = 0; i < old_plane_count; i++) { in dc_state_rem_all_phantom_planes_for_stream()
949 for (i = 0; i < phantom_count; i++) in dc_state_release_phantom_streams_and_planes()
[all …]
/drivers/gpu/drm/
A Ddrm_color_mgmt.c318 for (i = 0; i < size; i++) { in drm_crtc_legacy_gamma_set()
656 for (i = 0; i < 256; ++i) in drm_crtc_load_gamma_888()
677 for (i = 0; i < 32; ++i) { in drm_crtc_load_gamma_565_from_888()
737 for (i = 0; i < 256; ++i) in drm_crtc_fill_gamma_888()
738 fill_gamma_888(crtc, i, i, i, i, set_gamma); in drm_crtc_fill_gamma_888()
763 for (i = 0; i < 32; ++i) in drm_crtc_fill_gamma_565()
764 fill_gamma_565(crtc, i, i, i, i, set_gamma); in drm_crtc_fill_gamma_565()
766 for (i = 32; i < 64; ++i) in drm_crtc_fill_gamma_565()
792 for (i = 0; i < 32; ++i) in drm_crtc_fill_gamma_555()
815 for (i = 0; i < 256; ++i) in drm_crtc_load_palette_8()
[all …]
/drivers/media/v4l2-core/
A Dv4l2-vp9.c1189 for (i = 0; i < ARRAY_SIZE(probs->tx8); i++) { in update_tx_probs()
1229 for (i = 0; i < ARRAY_SIZE(probs->coef); i++) { in update_coef_probs()
1245 for (i = 0; i < ARRAY_SIZE(probs->skip); i++) in update_skip_probs()
1337 for (i = 0; i < 4; i++) in update_partition_probs()
1372 p[i] = update_mv_prob(d[i], p[i]); in update_mv_probs()
1381 p[i] = update_mv_prob(d[i], p[i]); in update_mv_probs()
1405 p[i] = update_mv_prob(d[i], p[i]); in update_mv_probs()
1409 p[i] = update_mv_prob(d[i], p[i]); in update_mv_probs()
1467 for (i = 0; i < 4; ++i) in v4l2_vp9_reset_frame_ctx()
1699 for (i = 0; i < ARRAY_SIZE(probs->coef); i++) in _adapt_coef_probs()
[all …]
/drivers/net/ethernet/intel/ixgbevf/
A Dethtool.c174 for (i = 0; i < 2; i++) in ixgbevf_get_regs()
176 for (i = 0; i < 2; i++) in ixgbevf_get_regs()
178 for (i = 0; i < 2; i++) in ixgbevf_get_regs()
180 for (i = 0; i < 2; i++) in ixgbevf_get_regs()
182 for (i = 0; i < 2; i++) in ixgbevf_get_regs()
184 for (i = 0; i < 2; i++) in ixgbevf_get_regs()
186 for (i = 0; i < 2; i++) in ixgbevf_get_regs()
193 for (i = 0; i < 2; i++) in ixgbevf_get_regs()
195 for (i = 0; i < 2; i++) in ixgbevf_get_regs()
197 for (i = 0; i < 2; i++) in ixgbevf_get_regs()
[all …]
/drivers/hid/amd-sfh-hid/
A Damd_sfh_client.c26 int i; in amd_sfh_set_report() local
28 for (i = 0; i < cli_data->num_hid_devices; i++) { in amd_sfh_set_report()
42 int i; in amd_sfh_get_report() local
44 for (i = 0; i < cli_data->num_hid_devices; i++) { in amd_sfh_get_report()
120 for (i = 0; i < cli_data->num_hid_devices; i++) { in amd_sfh_work_buffer()
167 for (i = 0; i < cl_data->num_hid_devices; i++) { in amd_sfh_resume()
192 for (i = 0; i < cl_data->num_hid_devices; i++) { in amd_sfh_suspend()
240 for (i = 0; i < cl_data->num_hid_devices; i++) { in amd_sfh_hid_client_init()
320 for (i = 0; i < cl_data->num_hid_devices; i++) { in amd_sfh_hid_client_init()
346 for (i = 0; i < cl_data->num_hid_devices; i++) { in amd_sfh_hid_client_init()
[all …]
/drivers/gpu/drm/amd/display/dc/dml/dcn321/
A Ddcn321_fpu.c229 for (i = *num_entries; i > index; i--) in dcn321_insert_entry_into_table_sorted()
245 for (i = index; i < *num_entries - 1; i++) { in remove_entry_from_table_at_index()
364 for (i = 0; i < MAX_NUM_DPM_LVL; i++) { in build_synthetic_soc_states()
434 for (i = 0; i < num_dcfclk_stas; i++) { in build_synthetic_soc_states()
454 for (i = 0; i < num_uclk_dpms; i++) { in build_synthetic_soc_states()
466 for (i = 0; i < num_fclk_dpms; i++) { in build_synthetic_soc_states()
492 for (i = *num_entries - 1; i >= 0 ; i--) { in build_synthetic_soc_states()
522 for (i = *num_entries - 1; i >= 0 ; i--) { in build_synthetic_soc_states()
552 for (i = *num_entries - 1; i >= 0 ; i--) { in build_synthetic_soc_states()
721 for (i = 0; i < MAX_NUM_DPM_LVL; i++) { in dcn321_update_bw_bounding_box_fpu()
[all …]
/drivers/input/joystick/
A Dcobra.c47 for (i = 0; i < 2; i++) { in cobra_read_packet()
48 r[i] = buf[i] = 0; in cobra_read_packet()
59 for (i = 0, w = u ^ v; i < 2 && w; i++, w >>= 2) in cobra_read_packet()
73 for (i = 0; i < 2; i++) { in cobra_read_packet()
78 buf[i] = (buf[i] >> 1) | ((__u64)(buf[i] & 1) << (COBRA_LENGTH - 1)); in cobra_read_packet()
82 data[i] = ((buf[i] >> 7) & 0x000001f) | ((buf[i] >> 8) & 0x00003e0) in cobra_read_packet()
105 for (i = 0; i < 2; i++) in cobra_poll()
158 for (i = 0; i < 2; i++) in cobra_connect()
159 if ((cobra->exists >> i) & data[i] & 1) { in cobra_connect()
173 for (i = 0; i < 2; i++) { in cobra_connect()
[all …]
A Danalog.c125 for (i = 0; i < 4; i++) in analog_decode()
131 for (i = j = 0; i < 6; i++) in analog_decode()
136 for (i = 0; i < 4; i++) in analog_decode()
148 for (i = j = 0; i < 4; i++) in analog_decode()
152 for (i = j = 0; i < 3; i++) in analog_decode()
207 for (--i; i >= 0; i--) { in analog_cooked_read()
274 for (i = 0; i < 2; i++) in analog_poll()
429 for (i = 0; i < 2; i++) in analog_init_device()
436 for (i = 0; i < 4; i++) in analog_init_device()
499 for (i = 0; i < 4; i++) max[i] = port->axes[i] << 1; in analog_init_masks()
[all …]
A Dgamecon.c268 for (i = 0; i < 32; i++) in gc_n64_play_effect()
278 for (i = 0; i < 32; i++) in gc_n64_play_effect()
644 for (i = 0; i < 4; i++) in gc_psx_report_one()
648 for (i = 0; i < 4; i++) in gc_psx_report_one()
658 for (i = 0; i < 8; i++) in gc_psx_report_one()
692 for (i = 0; i < 8; i++) in gc_psx_report_one()
833 for (i = 0; i < 2; i++) in gc_setup_pad()
868 for (i = 4; i < 8; i++) in gc_setup_pad()
873 for (i = 0; i < 4; i++) in gc_setup_pad()
886 for (i = 0; i < 6; i++) in gc_setup_pad()
[all …]
/drivers/gpu/drm/amd/amdgpu/
A Darct_reg_init.c32 uint32_t i; in arct_reg_base_init() local
33 for (i = 0 ; i < MAX_INSTANCE ; ++i) { in arct_reg_base_init()
34 adev->reg_offset[GC_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); in arct_reg_base_init()
35 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); in arct_reg_base_init()
38 adev->reg_offset[NBIO_HWIP][i] = (uint32_t *)(&(NBIF0_BASE.instance[i])); in arct_reg_base_init()
39 adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); in arct_reg_base_init()
40 adev->reg_offset[MP1_HWIP][i] = (uint32_t *)(&(MP1_BASE.instance[i])); in arct_reg_base_init()
41 adev->reg_offset[UVD_HWIP][i] = (uint32_t *)(&(UVD_BASE.instance[i])); in arct_reg_base_init()
42 adev->reg_offset[DF_HWIP][i] = (uint32_t *)(&(DF_BASE.instance[i])); in arct_reg_base_init()
53 adev->reg_offset[THM_HWIP][i] = (uint32_t *)(&(THM_BASE.instance[i])); in arct_reg_base_init()
[all …]
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
A Dsmu_helper.c60 for (i = 0; i < power_saving_clock_count; i++) in phm_copy_clock_limits_array()
82 for (i = 0; i < od_setting_count; i++) in phm_copy_overdrive_settings_limits_array()
121 for (i = 0; i < hwmgr->usec_timeout; i++) { in phm_wait_on_register()
223 for (i = 0; i < vol_table->count; i++) { in phm_trim_voltage_table()
264 for (i = 0; i < dep_table->count; i++) { in phm_get_svi2_mvdd_voltage_table()
292 for (i = 0; i < dep_table->count; i++) { in phm_get_svi2_vddci_voltage_table()
320 for (i = 0; i < vol_table->count; i++) { in phm_get_svi2_vdd_voltage_table()
338 for (i = 0; i < max_vol_steps; i++) in phm_trim_voltage_table_to_fit_state_table()
355 for (i = 0; i < dpm_table->count; i++) in phm_reset_single_dpm_table()
420 for (i = 0; i < count; i++) { in phm_get_voltage_id()
[all …]
/drivers/infiniband/core/
A Dpacker.c67 int i; in ib_pack() local
69 for (i = 0; i < desc_len; ++i) { in ib_pack()
70 if (desc[i].size_bits <= 32) { in ib_pack()
76 shift = 32 - desc[i].offset_bits - desc[i].size_bits; in ib_pack()
93 shift = 64 - desc[i].offset_bits - desc[i].size_bits; in ib_pack()
108 desc[i].field_name, desc[i].size_bits); in ib_pack()
153 int i; in ib_unpack() local
155 for (i = 0; i < desc_len; ++i) { in ib_unpack()
165 shift = 32 - desc[i].offset_bits - desc[i].size_bits; in ib_unpack()
179 shift = 64 - desc[i].offset_bits - desc[i].size_bits; in ib_unpack()
[all …]
/drivers/media/pci/cx18/
A Dcx18-av-vbi.c98 int i; in decode_vps() local
100 for (i = 0; i < 2 * 13; i += 2) { in decode_vps()
132 for (i = 7; i <= 23; i++) { in cx18_av_g_sliced_fmt()
141 for (i = 10; i <= 21; i++) { in cx18_av_g_sliced_fmt()
188 for (i = 0; i <= 6; i++) in cx18_av_s_sliced_fmt()
192 for (i = 0; i <= 9; i++) in cx18_av_s_sliced_fmt()
196 for (i = 22; i <= 23; i++) in cx18_av_s_sliced_fmt()
202 for (i = 7; i <= 23; i++) { in cx18_av_s_sliced_fmt()
222 for (x = 1, i = 0x424; i <= 0x434; i++, x++) in cx18_av_s_sliced_fmt()
225 for (x = 1, i = 0x424; i <= 0x430; i++, x++) in cx18_av_s_sliced_fmt()
[all …]

Completed in 108 milliseconds

12345678910>>...225