Searched refs:id__ (Results 1 – 5 of 5) sorted by relevance
| /drivers/gpu/drm/xe/ |
| A D | xe_device.h | 122 #define for_each_tile(tile__, xe__, id__) \ argument
123 for ((id__) = 0; (id__) < (xe__)->info.tile_count; (id__)++) \
124 for_each_if((tile__) = &(xe__)->tiles[(id__)])
126 #define for_each_remote_tile(tile__, xe__, id__) \ argument
127 for ((id__) = 1; (id__) < (xe__)->info.tile_count; (id__)++) \
128 for_each_if((tile__) = &(xe__)->tiles[(id__)])
130 #define for_each_gt(gt__, xe__, id__) \ argument
131 for ((id__) = 0; (id__) < (xe__)->info.tile_count * (xe__)->info.max_gt_per_tile; (id__)++) \
132 for_each_if((gt__) = xe_device_get_gt((xe__), (id__)))
134 #define for_each_gt_on_tile(gt__, tile__, id__) \ argument
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| A D | xe_wa.h | 32 #define XE_WA(gt__, id__) ({ \ argument
34 test_bit(XE_WA_OOB_ ## id__, (gt__)->wa_active.oob); \
43 #define XE_DEVICE_WA(xe__, id__) ({ \ argument
45 test_bit(XE_DEVICE_WA_OOB_ ## id__, (xe__)->wa_active.oob); \
48 #define XE_DEVICE_WA_DISABLE(xe__, id__) ({ \ argument
50 clear_bit(XE_DEVICE_WA_OOB_ ## id__, (xe__)->wa_active.oob); \
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| A D | xe_gt.h | 17 #define for_each_hw_engine(hwe__, gt__, id__) \ argument
18 for ((id__) = 0; (id__) < ARRAY_SIZE((gt__)->hw_engines); (id__)++) \
19 for_each_if(((hwe__) = (gt__)->hw_engines + (id__)) && \
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| /drivers/gpu/drm/i915/gt/ |
| A D | intel_gt.h | 178 #define for_each_gt(gt__, i915__, id__) \ argument
179 for ((id__) = 0; \
180 (id__) < I915_MAX_GT; \
181 (id__)++) \
182 for_each_if(((gt__) = (i915__)->gt[(id__)]))
185 #define for_each_engine(engine__, gt__, id__) \ argument
186 for ((id__) = 0; \
187 (id__) < I915_NUM_ENGINES; \
188 (id__)++) \
189 for_each_if ((engine__) = (gt__)->engine[(id__)])
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| /drivers/gpu/drm/i915/ |
| A D | intel_uncore.c | 2164 #define fw_domain_init(uncore__, id__, set__, ack__) \ in intel_uncore_fw_domains_init() argument
2165 (ret ?: (ret = __fw_domain_init((uncore__), (id__), (set__), (ack__)))) in intel_uncore_fw_domains_init()
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