Home
last modified time | relevance | path

Searched refs:initval (Results 1 – 12 of 12) sorted by relevance

/drivers/clk/sophgo/
A Dclk-cv18xx-ip.c121 if (div->initval > 0) in div_helper_set_rate()
137 if (!div || div->initval < 0 || (div->width == 0 && div->initval <= 0)) in div_helper_get_clockdiv()
140 if (div->width == 0 && div->initval > 0) in div_helper_get_clockdiv()
141 return div->initval; in div_helper_get_clockdiv()
145 if (div->initval == 0 || DIV_GET_EN_CLK_DIV_FACTOR(reg)) in div_helper_get_clockdiv()
147 else if (div->initval > 0) in div_helper_get_clockdiv()
148 clockdiv = div->initval; in div_helper_get_clockdiv()
158 if (div->initval <= 0) in div_helper_round_rate()
161 return DIV_ROUND_UP_ULL(*prate, div->initval); in div_helper_round_rate()
A Dclk-sg2042-clkgen.c109 u32 initval; member
165 val = divider->initval; in sg2042_clk_divider_recalc_rate()
190 bestdiv = divider->initval; in sg2042_clk_divider_round_rate()
290 .initval = _initval, \
306 .initval = _initval, \
322 .initval = _initval, \
338 .initval = _initval, \
354 .initval = _initval, \
370 .initval = _initval, \
A Dclk-cv18xx-common.h41 s16 initval; member
56 .initval = _initval, \
A Dclk-sg2044.c32 u32 initval; member
105 return div->initval == 0 ? 1 : div->initval; in sg2044_div_get_reg_div()
311 .initval = (_div_initval), \
327 .initval = (_div_initval), \
343 .initval = (_div_initval), \
359 .initval = (_div_initval), \
/drivers/iio/proximity/
A Dsx_common.c430 const struct sx_common_reg_default *initval; in sx_common_init_device() local
448 initval = data->chip_info->ops.get_default_reg(dev, i, &tmp); in sx_common_init_device()
449 ret = regmap_write(data->regmap, initval->reg, initval->def); in sx_common_init_device()
/drivers/clk/
A Dclk-bm1880.c93 u32 initval; member
190 .div.initval = _initval, \
599 val = div->initval; in bm1880_clk_div_recalc_rate()
815 div_hws->div.initval = clks->div_initval; in bm1880_clk_register_composite()
/drivers/net/wireless/broadcom/b43/
A Dphy_g.h185 u16 initval; //FIXME rename? member
A Dphy_g.c2044 if (gphy->initval == 0xFFFF) in b43_phy_initg()
2045 gphy->initval = b43_radio_init2050(dev); in b43_phy_initg()
2047 b43_radio_write16(dev, 0x0078, gphy->initval); in b43_phy_initg()
2486 gphy->initval = 0xFFFF; in b43_gphy_op_prepare_structs()
/drivers/net/wireless/broadcom/b43legacy/
A Db43legacy.h508 u16 initval; member
A Dphy.c1033 if (phy->initval == 0xFFFF) in b43legacy_phy_initg()
1034 phy->initval = b43legacy_radio_init2050(dev); in b43legacy_phy_initg()
1036 b43legacy_radio_write16(dev, 0x0078, phy->initval); in b43legacy_phy_initg()
A Dmain.c3117 phy->initval = 0xFFFF; in setup_struct_phy_for_init()
3230 phy->initval = 0xFFFF; in prepare_phy_data_for_init()
/drivers/net/dsa/
A Dvitesse-vsc73xx-core.c1034 static void vsc73xx_reset_port(struct vsc73xx *vsc, int port, u32 initval) in vsc73xx_reset_port() argument
1063 VSC73XX_MAC_CFG_RESET | initval); in vsc73xx_reset_port()

Completed in 48 milliseconds