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Searched refs:inst_header (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/amd/include/
A Damdgpu_reg_state.h76 struct amdgpu_reg_inst_header inst_header; member
89 struct amdgpu_reg_inst_header inst_header; member
102 struct amdgpu_reg_inst_header inst_header; member
121 struct amdgpu_reg_inst_header inst_header; member
/drivers/gpu/drm/amd/amdgpu/
A Daqua_vanjaram.c636 pcie_regs->inst_header.instance = 0; in aqua_vanjaram_read_pcie_state()
637 pcie_regs->inst_header.state = AMDGPU_INST_S_OK; in aqua_vanjaram_read_pcie_state()
638 pcie_regs->inst_header.num_smn_regs = NUM_PCIE_SMN_REGS; in aqua_vanjaram_read_pcie_state()
730 xgmi_regs->inst_header.instance = inst++; in aqua_vanjaram_read_xgmi_state()
732 xgmi_regs->inst_header.state = AMDGPU_INST_S_OK; in aqua_vanjaram_read_xgmi_state()
733 xgmi_regs->inst_header.num_smn_regs = NUM_XGMI_SMN_REGS; in aqua_vanjaram_read_xgmi_state()
804 wafl_regs->inst_header.instance = inst++; in aqua_vanjaram_read_wafl_state()
806 wafl_regs->inst_header.state = AMDGPU_INST_S_OK; in aqua_vanjaram_read_wafl_state()
929 usr_regs->inst_header.instance = inst++; in aqua_vanjaram_read_usr_state()
930 usr_regs->inst_header.state = AMDGPU_INST_S_OK; in aqua_vanjaram_read_usr_state()
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/drivers/gpu/drm/xe/
A Dxe_lrc.c1577 u32 inst_header = *dw; in dump_mi_command() local
1578 u32 numdw = instr_dw(inst_header); in dump_mi_command()
1579 u32 opcode = REG_FIELD_GET(MI_OPCODE, inst_header); in dump_mi_command()
1583 switch (inst_header & MI_OPCODE) { in dump_mi_command()
1593 drm_printf(p, "[%#010x] MI_TOPOLOGY_FILTER\n", inst_header); in dump_mi_command()
1597 drm_printf(p, "[%#010x] MI_BATCH_BUFFER_END\n", inst_header); in dump_mi_command()
1609 switch (inst_header & MI_OPCODE) { in dump_mi_command()
1612 inst_header, (numdw - 1) / 2); in dump_mi_command()
1619 inst_header, in dump_mi_command()
1632 drm_printf(p, "[%#010x] MI_FORCE_WAKEUP\n", inst_header); in dump_mi_command()
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