Home
last modified time | relevance | path

Searched refs:int_mask (Results 1 – 25 of 64) sorted by relevance

123

/drivers/gpio/
A Dgpio-xgs-iproc.c70 u32 int_mask, irq_type, event_mask; in iproc_gpio_irq_unmask() local
76 int_mask = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_LEVEL_MASK); in iproc_gpio_irq_unmask()
83 int_mask |= 1 << pin; in iproc_gpio_irq_unmask()
84 writel_relaxed(int_mask, in iproc_gpio_irq_unmask()
97 u32 irq_type, int_mask, event_mask; in iproc_gpio_irq_mask() local
102 int_mask = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_LEVEL_MASK); in iproc_gpio_irq_mask()
109 int_mask &= ~BIT(pin); in iproc_gpio_irq_mask()
110 writel_relaxed(int_mask, in iproc_gpio_irq_mask()
A Dgpio-rockchip.c44 .int_mask = 0x34,
58 .int_mask = 0x18,
498 bank->saved_masks = irq_reg_readl(gc, bank->gpio_regs->int_mask); in rockchip_irq_suspend()
499 irq_reg_writel(gc, ~gc->wake_active, bank->gpio_regs->int_mask); in rockchip_irq_suspend()
507 irq_reg_writel(gc, bank->saved_masks, bank->gpio_regs->int_mask); in rockchip_irq_resume()
553 gc->chip_types[0].regs.mask = bank->gpio_regs->int_mask; in rockchip_interrupts_register()
573 rockchip_gpio_writel(bank, 0xffffffff, bank->gpio_regs->int_mask); in rockchip_interrupts_register()
/drivers/gpu/drm/sprd/
A Dsprd_dpu.c407 u32 int_mask = 0; in sprd_dpu_init() local
426 int_mask |= BIT_DPU_INT_UPDATE_DONE; in sprd_dpu_init()
428 int_mask |= BIT_DPU_INT_DONE; in sprd_dpu_init()
430 int_mask |= BIT_DPU_INT_VSYNC; in sprd_dpu_init()
432 int_mask |= BIT_DPU_INT_TE; in sprd_dpu_init()
434 int_mask |= BIT_DPU_INT_ERR; in sprd_dpu_init()
444 int_mask |= BIT_DPU_INT_DONE; in sprd_dpu_init()
446 int_mask |= BIT_DPU_INT_TE; in sprd_dpu_init()
751 u32 reg_val, int_mask = 0; in sprd_dpu_isr() local
757 int_mask |= BIT_DPU_INT_ERR; in sprd_dpu_isr()
[all …]
/drivers/net/fddi/
A Ddefza.c232 writew_o(fp->int_mask, &fp->regs->int_mask); in fza_do_reset()
295 old_mask = fp->int_mask; in fza_cmd_send()
299 fp->int_mask = new_mask; in fza_cmd_send()
371 fp->int_mask = old_mask; in fza_cmd_send()
372 writew_u(fp->int_mask, &fp->regs->int_mask); in fza_cmd_send()
1064 writew_o(fp->int_mask, &fp->regs->int_mask); in fza_reset_timer()
1122 old_mask = fp->int_mask; in fza_start_xmit()
1126 fp->int_mask = new_mask; in fza_start_xmit()
1130 fp->int_mask = old_mask; in fza_start_xmit()
1131 writew_u(fp->int_mask, &fp->regs->int_mask); in fza_start_xmit()
[all …]
/drivers/net/wireless/ath/ath5k/
A Ddma.c742 enum ath5k_int old_mask, int_mask; in ath5k_hw_set_imr() local
760 int_mask = new_mask & AR5K_INT_COMMON; in ath5k_hw_set_imr()
769 int_mask |= AR5K_IMR_HIUERR; in ath5k_hw_set_imr()
776 int_mask |= AR5K_IMR_TIM; in ath5k_hw_set_imr()
791 int_mask |= AR5K_INT_BNR; in ath5k_hw_set_imr()
795 ath5k_hw_reg_write(ah, int_mask, AR5K_PIMR); in ath5k_hw_set_imr()
801 int_mask |= (AR5K_IMR_SSERR | AR5K_IMR_MCABT in ath5k_hw_set_imr()
805 ath5k_hw_reg_write(ah, int_mask, AR5K_IMR); in ath5k_hw_set_imr()
/drivers/perf/hisilicon/
A Dhisi_uncore_ddrc_pmu.c81 u32 int_mask; member
199 val = readl(ddrc_pmu->base + regs->int_mask); in hisi_ddrc_pmu_enable_counter_int()
201 writel(val, ddrc_pmu->base + regs->int_mask); in hisi_ddrc_pmu_enable_counter_int()
210 val = readl(ddrc_pmu->base + regs->int_mask); in hisi_ddrc_pmu_disable_counter_int()
212 writel(val, ddrc_pmu->base + regs->int_mask); in hisi_ddrc_pmu_disable_counter_int()
438 .int_mask = DDRC_INT_MASK,
456 .int_mask = DDRC_V2_INT_MASK,
474 .int_mask = DDRC_V3_INT_MASK,
A Dhisi_uncore_sllc_pmu.c71 u32 int_mask; member
300 val = readl(sllc_pmu->base + regs->int_mask); in hisi_sllc_pmu_enable_counter_int()
302 writel(val, sllc_pmu->base + regs->int_mask); in hisi_sllc_pmu_enable_counter_int()
311 val = readl(sllc_pmu->base + regs->int_mask); in hisi_sllc_pmu_disable_counter_int()
313 writel(val, sllc_pmu->base + regs->int_mask); in hisi_sllc_pmu_disable_counter_int()
405 .int_mask = SLLC_INT_MASK,
426 .int_mask = SLLC_V3_INT_MASK,
/drivers/crypto/marvell/cesa/
A Dcesa.h464 u32 int_mask; member
713 u32 int_mask) in mv_cesa_set_int_mask() argument
715 if (int_mask == engine->int_mask) in mv_cesa_set_int_mask()
718 writel_relaxed(int_mask, engine->regs + CESA_SA_INT_MSK); in mv_cesa_set_int_mask()
719 engine->int_mask = int_mask; in mv_cesa_set_int_mask()
724 return engine->int_mask; in mv_cesa_get_int_mask()
/drivers/i2c/busses/
A Di2c-axxia.c468 u32 int_mask = MST_STATUS_ERR | MST_STATUS_SS | MST_STATUS_RFL; in axxia_i2c_xfer_seq() local
487 i2c_int_enable(idev, int_mask); in axxia_i2c_xfer_seq()
514 u32 int_mask = MST_STATUS_ERR; in axxia_i2c_xfer_msg() local
542 int_mask |= MST_STATUS_RFL; in axxia_i2c_xfer_msg()
544 int_mask |= MST_STATUS_TFL; in axxia_i2c_xfer_msg()
555 int_mask |= MST_STATUS_SNS; in axxia_i2c_xfer_msg()
558 int_mask |= MST_STATUS_SS; in axxia_i2c_xfer_msg()
563 i2c_int_enable(idev, int_mask); in axxia_i2c_xfer_msg()
568 i2c_int_disable(idev, int_mask); in axxia_i2c_xfer_msg()
A Di2c-tegra.c379 u32 int_mask; in tegra_i2c_mask_irq() local
382 i2c_writel(i2c_dev, int_mask, I2C_INT_MASK); in tegra_i2c_mask_irq()
387 u32 int_mask; in tegra_i2c_unmask_irq() local
390 i2c_writel(i2c_dev, int_mask, I2C_INT_MASK); in tegra_i2c_unmask_irq()
1250 u32 int_mask; in tegra_i2c_xfer_msg() local
1300 tegra_i2c_unmask_irq(i2c_dev, int_mask); in tegra_i2c_xfer_msg()
1325 int_mask |= I2C_INT_PACKET_XFER_COMPLETE; in tegra_i2c_xfer_msg()
1329 int_mask |= I2C_INT_RX_FIFO_DATA_REQ; in tegra_i2c_xfer_msg()
1331 int_mask |= I2C_INT_TX_FIFO_DATA_REQ; in tegra_i2c_xfer_msg()
1334 tegra_i2c_unmask_irq(i2c_dev, int_mask); in tegra_i2c_xfer_msg()
[all …]
/drivers/input/keyboard/
A Dnspire-keypad.c33 u32 int_mask; member
61 int_sts = readl(keypad->reg_base + KEYPAD_INT) & keypad->int_mask; in nspire_keypad_irq()
127 keypad->int_mask = 1 << 1; in nspire_keypad_open()
128 writel(keypad->int_mask, keypad->reg_base + KEYPAD_INTMSK); in nspire_keypad_open()
/drivers/char/tpm/
A Dtpm_tis_core.c50 static u8 tpm_tis_filter_sts_mask(u8 int_mask, u8 sts_mask) in tpm_tis_filter_sts_mask() argument
52 if (!(int_mask & TPM_INTF_STS_VALID_INT)) in tpm_tis_filter_sts_mask()
55 if (!(int_mask & TPM_INTF_DATA_AVAIL_INT)) in tpm_tis_filter_sts_mask()
58 if (!(int_mask & TPM_INTF_CMD_READY_INT)) in tpm_tis_filter_sts_mask()
84 sts_mask = tpm_tis_filter_sts_mask(priv->int_mask, sts_mask); in wait_for_tpm_stat()
514 u32 int_mask = 0; in __tpm_tis_disable_interrupts() local
516 tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &int_mask); in __tpm_tis_disable_interrupts()
517 int_mask &= ~TPM_GLOBAL_INT_ENABLE; in __tpm_tis_disable_interrupts()
518 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), int_mask); in __tpm_tis_disable_interrupts()
1288 priv->int_mask = intmask; in tpm_tis_core_init()
[all …]
/drivers/input/misc/
A Dadxl34x.c207 unsigned int_mask; member
770 ac->int_mask = FREE_FALL; in adxl34x_probe()
778 ac->int_mask |= ACTIVITY | INACTIVITY; in adxl34x_probe()
781 ac->int_mask |= WATERMARK; in adxl34x_probe()
785 ac->int_mask |= DATA_READY; in adxl34x_probe()
789 ac->int_mask |= SINGLE_TAP | DOUBLE_TAP; in adxl34x_probe()
832 AC_WRITE(ac, INT_MAP, ac->int_mask | OVERRUN); in adxl34x_probe()
859 AC_WRITE(ac, INT_ENABLE, ac->int_mask | OVERRUN); in adxl34x_probe()
/drivers/pci/controller/dwc/
A Dpcie-spear13xx.c40 u32 int_mask; /* cr8 */ member
109 writel(readl(&app_reg->int_mask) | in spear13xx_pcie_enable_interrupts()
110 MSI_CTRL_INT, &app_reg->int_mask); in spear13xx_pcie_enable_interrupts()
/drivers/gpu/drm/qxl/
A Dqxl_irq.c69 qdev->ram_header->int_mask = QXL_INTERRUPT_MASK; in qxl_irq_handler()
100 qdev->ram_header->int_mask = QXL_INTERRUPT_MASK; in qxl_irq_init()
/drivers/net/ethernet/atheros/alx/
A Dmain.c321 alx_write_mem32(hw, ALX_IMR, alx->int_mask); in alx_poll()
349 alx->int_mask &= ~ALX_ISR_PHY; in alx_intr_handle_misc()
350 alx_write_mem32(hw, ALX_IMR, alx->int_mask); in alx_intr_handle_misc()
365 intr &= alx->int_mask; in alx_intr_handle()
373 alx->int_mask &= ~ALX_ISR_ALL_QUEUES; in alx_intr_handle()
374 alx_write_mem32(hw, ALX_IMR, alx->int_mask); in alx_intr_handle()
745 alx->int_mask &= ~ALX_ISR_ALL_QUEUES; in alx_alloc_napis()
773 alx->int_mask |= tx_vect_mask[i]; in alx_alloc_napis()
789 alx->int_mask |= rx_vect_mask[0]; in alx_alloc_napis()
1072 alx->int_mask = ALX_ISR_MISC; in alx_init_sw()
[all …]
A Dalx.h127 u32 int_mask; member
/drivers/hid/intel-thc-hid/intel-quickspi/
A Dpci-quickspi.c291 int int_mask; in quickspi_irq_thread_handler() local
301 int_mask = thc_interrupt_handler(qsdev->thc_hw); in quickspi_irq_thread_handler()
303 if (int_mask & BIT(THC_FATAL_ERR_INT) || int_mask & BIT(THC_TXN_ERR_INT)) { in quickspi_irq_thread_handler()
308 if (int_mask & BIT(THC_NONDMA_INT)) { in quickspi_irq_thread_handler()
318 if (int_mask & BIT(THC_RXDMA2_INT)) { in quickspi_irq_thread_handler()
/drivers/media/pci/bt8xx/
A Dbt878.c188 u32 int_mask; in bt878_start() local
207 int_mask = BT878_ASCERR | BT878_AOCERR | BT878_APABORT | in bt878_start()
213 int_mask &= ~irq_err_ignore; in bt878_start()
215 btwrite(int_mask, BT878_AINT_MASK); in bt878_start()
/drivers/hid/intel-thc-hid/intel-quicki2c/
A Dpci-quicki2c.c300 int int_mask; in quicki2c_irq_thread_handler() local
310 int_mask = thc_interrupt_handler(qcdev->thc_hw); in quicki2c_irq_thread_handler()
312 if (int_mask & BIT(THC_FATAL_ERR_INT) || int_mask & BIT(THC_TXN_ERR_INT) || in quicki2c_irq_thread_handler()
313 int_mask & BIT(THC_UNKNOWN_INT)) { in quicki2c_irq_thread_handler()
318 if (int_mask & BIT(THC_RXDMA2_INT)) { in quicki2c_irq_thread_handler()
/drivers/ntb/hw/amd/
A Dntb_hw_amd.c349 ndev->int_mask &= ~AMD_EVENT_INTMASK; in amd_ntb_link_enable()
350 writel(ndev->int_mask, mmio + AMD_INTMASK_OFFSET); in amd_ntb_link_enable()
365 ndev->int_mask |= AMD_EVENT_INTMASK; in amd_ntb_link_disable()
366 writel(ndev->int_mask, mmio + AMD_INTMASK_OFFSET); in amd_ntb_link_disable()
962 ndev->int_mask = AMD_EVENT_INTMASK; in ndev_init_struct()
1089 writel(ndev->int_mask, mmio + AMD_INTMASK_OFFSET); in amd_init_ntb()
1146 ndev->int_mask &= ~(AMD_LINK_UP_EVENT | AMD_LINK_DOWN_EVENT); in amd_init_dev()
1147 writel(ndev->int_mask, mmio + AMD_INTMASK_OFFSET); in amd_init_dev()
/drivers/mmc/host/
A Dtoshsd.c292 u32 int_reg, int_mask, int_status, detail; in toshsd_irq() local
297 int_mask = ioread32(host->ioaddr + SD_INTMASKCARD); in toshsd_irq()
298 int_reg = int_status & ~int_mask & ~IRQ_DONT_CARE_BITS; in toshsd_irq()
301 int_status, int_mask); in toshsd_irq()
/drivers/bus/
A Dsunxi-rsb.c275 u32 int_mask, status; in _sunxi_rsb_run_xfer() local
285 int_mask = RSB_INTS_LOAD_BSY | RSB_INTS_TRANS_ERR | RSB_INTS_TRANS_OVER; in _sunxi_rsb_run_xfer()
286 writel(int_mask, rsb->regs + RSB_INTE); in _sunxi_rsb_run_xfer()
292 status, (status & int_mask), in _sunxi_rsb_run_xfer()
/drivers/net/wireless/ath/wcn36xx/
A Ddxe.c584 u32 int_mask, in wcn36xx_rx_handle_packets() argument
595 wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_0_INT_CLR, int_mask); in wcn36xx_rx_handle_packets()
600 int_mask); in wcn36xx_rx_handle_packets()
608 int_mask); in wcn36xx_rx_handle_packets()
613 int_mask); in wcn36xx_rx_handle_packets()
/drivers/usb/gadget/udc/
A Dat91_udc.c280 if (list_empty(&ep->queue) && ep->int_mask != (1 << 0)) in done()
281 at91_udp_write(udc, AT91_UDP_IDR, ep->int_mask); in done()
543 at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); in at91_ep_enable()
569 at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); in at91_ep_disable()
698 at91_udp_write(udc, AT91_UDP_IER, ep->int_mask); in at91_ep_queue()
768 at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); in at91_ep_set_halt()
1232 at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); in handle_setup()
1827 ep->int_mask = BIT(i); in at91udc_probe()

Completed in 83 milliseconds

123