| /drivers/media/platform/samsung/s5p-mfc/ |
| A D | s5p_mfc_intr.c | 26 (dev->int_cond && (dev->int_type == command in s5p_mfc_wait_for_done_dev() 27 || dev->int_type == S5P_MFC_R2H_CMD_ERR_RET)), in s5p_mfc_wait_for_done_dev() 31 dev->int_type, command); in s5p_mfc_wait_for_done_dev() 38 dev->int_type, command); in s5p_mfc_wait_for_done_dev() 39 if (dev->int_type == S5P_MFC_R2H_CMD_ERR_RET) in s5p_mfc_wait_for_done_dev() 47 dev->int_type = 0; in s5p_mfc_clean_dev_int_flags() 58 (ctx->int_cond && (ctx->int_type == command in s5p_mfc_wait_for_done_ctx() 69 ctx->int_type, command); in s5p_mfc_wait_for_done_ctx() 76 ctx->int_type, command); in s5p_mfc_wait_for_done_ctx() 77 if (ctx->int_type == S5P_MFC_R2H_CMD_ERR_RET) in s5p_mfc_wait_for_done_ctx() [all …]
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| A D | s5p_mfc_ctrl.c | 272 if (dev->int_err != 0 || dev->int_type != in s5p_mfc_init_hw() 276 dev->int_err, dev->int_type); in s5p_mfc_init_hw() 323 if (dev->int_err != 0 || dev->int_type != in s5p_mfc_sleep() 327 dev->int_type); in s5p_mfc_sleep() 418 if (dev->int_err != 0 || dev->int_type != in s5p_mfc_wakeup() 422 dev->int_type); in s5p_mfc_wakeup()
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| A D | s5p_mfc_common.h | 323 int int_type; member 638 int int_type; member
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| /drivers/scsi/ |
| A D | qlogicfas408.h | 83 int int_type; /* type of irq, 2 for ISA board, 0 for PCMCIA */ member 92 #define REG1 ( outb( inb( qbase + 0xd ) | 0x80 , qbase + 0xd ), outb( 0xb4 | int_type, qbase + 0xd … 114 int qlogicfas408_get_chip_type(int qbase, int int_type); 115 void qlogicfas408_setup(int qbase, int id, int int_type); 116 int qlogicfas408_detect(int qbase, int int_type);
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| A D | qlogicfas408.c | 86 int int_type = priv->int_type; in ql_zap() local 221 int int_type = priv->int_type; in ql_icmd() local 275 int int_type = priv->int_type; in ql_pcmd() local 560 int qlogicfas408_get_chip_type(int qbase, int int_type) in qlogicfas408_get_chip_type() argument 570 void qlogicfas408_setup(int qbase, int id, int int_type) in qlogicfas408_setup() argument 594 int qlogicfas408_detect(int qbase, int int_type) in qlogicfas408_detect() argument 608 int int_type = priv->int_type; in qlogicfas408_disable_ints() local
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| A D | qlogicfas.c | 111 priv->int_type = INT_TYPE; in __qlogicfas_detect()
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| /drivers/net/wwan/t7xx/ |
| A D | t7xx_pcie_mac.c | 211 enum t7xx_int int_type, bool clear) in t7xx_pcie_mac_clear_set_int() argument 221 val = BIT(EXT_INT_START + int_type); in t7xx_pcie_mac_clear_set_int() 225 void t7xx_pcie_mac_clear_int(struct t7xx_pci_dev *t7xx_dev, enum t7xx_int int_type) in t7xx_pcie_mac_clear_int() argument 227 t7xx_pcie_mac_clear_set_int(t7xx_dev, int_type, true); in t7xx_pcie_mac_clear_int() 230 void t7xx_pcie_mac_set_int(struct t7xx_pci_dev *t7xx_dev, enum t7xx_int int_type) in t7xx_pcie_mac_set_int() argument 232 t7xx_pcie_mac_clear_set_int(t7xx_dev, int_type, false); in t7xx_pcie_mac_set_int() 242 void t7xx_pcie_mac_clear_int_status(struct t7xx_pci_dev *t7xx_dev, enum t7xx_int int_type) in t7xx_pcie_mac_clear_int_status() argument 245 u32 val = BIT(EXT_INT_START + int_type); in t7xx_pcie_mac_clear_int_status()
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| A D | t7xx_pcie_mac.h | 26 void t7xx_pcie_mac_clear_int(struct t7xx_pci_dev *t7xx_dev, enum t7xx_int int_type); 27 void t7xx_pcie_mac_set_int(struct t7xx_pci_dev *t7xx_dev, enum t7xx_int int_type); 28 void t7xx_pcie_mac_clear_int_status(struct t7xx_pci_dev *t7xx_dev, enum t7xx_int int_type);
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| A D | t7xx_hif_dpmaif.c | 189 enum t7xx_int int_type; in t7xx_dpmaif_register_pcie_irq() local 196 int_type = isr_para->pcie_int; in t7xx_dpmaif_register_pcie_irq() 197 t7xx_pcie_mac_clear_int(t7xx_dev, int_type); in t7xx_dpmaif_register_pcie_irq() 199 t7xx_dev->intr_handler[int_type] = t7xx_dpmaif_isr_handler; in t7xx_dpmaif_register_pcie_irq() 200 t7xx_dev->intr_thread[int_type] = t7xx_dpmaif_isr_thread; in t7xx_dpmaif_register_pcie_irq() 201 t7xx_dev->callback_param[int_type] = isr_para; in t7xx_dpmaif_register_pcie_irq() 203 t7xx_pcie_mac_clear_int_status(t7xx_dev, int_type); in t7xx_dpmaif_register_pcie_irq() 204 t7xx_pcie_mac_set_int(t7xx_dev, int_type); in t7xx_dpmaif_register_pcie_irq()
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| /drivers/xen/xen-pciback/ |
| A D | conf_space_capability.c | 195 unsigned int int_type; /* interrupt type for exclusiveness check */ member 199 .int_type = INTERRUPT_TYPE_MSI, 203 .int_type = INTERRUPT_TYPE_MSIX, 245 int int_type = xen_pcibk_get_interrupt_type(dev); in msi_msix_flags_write() local 247 if (int_type == INTERRUPT_TYPE_NONE || in msi_msix_flags_write() 248 int_type == INTERRUPT_TYPE_INTX || in msi_msix_flags_write() 249 int_type == field_config->int_type) in msi_msix_flags_write()
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| /drivers/bus/ |
| A D | omap_l3_smx.c | 164 int int_type; in omap3_l3_app_irq() local 167 int_type = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR; in omap3_l3_app_irq() 168 if (!int_type) in omap3_l3_app_irq() 176 base = l3->rt + omap3_l3_bases[int_type][err_source]; in omap3_l3_app_irq() 189 BUG_ON(!int_type && status & L3_STATUS_0_TIMEOUT_MASK); in omap3_l3_app_irq() 192 clear = (L3_AGENT_STATUS_CLEAR_IA << int_type) | in omap3_l3_app_irq()
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| /drivers/gpio/ |
| A D | gpio-cadence.c | 86 u32 int_type; in cdns_gpio_irq_set_type() local 93 int_type = ioread32(cgpio->regs + CDNS_GPIO_IRQ_TYPE) & ~mask; in cdns_gpio_irq_set_type() 102 int_type |= mask; in cdns_gpio_irq_set_type() 105 int_type |= mask; in cdns_gpio_irq_set_type() 111 iowrite32(int_type, cgpio->regs + CDNS_GPIO_IRQ_TYPE); in cdns_gpio_irq_set_type()
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| A D | gpio-zynq.c | 111 u32 int_type[ZYNQMP_GPIO_MAX_BANK]; member 505 u32 int_type, int_pol, int_any; in zynq_gpio_set_irq_type() local 513 int_type = readl_relaxed(gpio->base_addr + in zynq_gpio_set_irq_type() 526 int_type |= BIT(bank_pin_num); in zynq_gpio_set_irq_type() 531 int_type |= BIT(bank_pin_num); in zynq_gpio_set_irq_type() 536 int_type |= BIT(bank_pin_num); in zynq_gpio_set_irq_type() 540 int_type &= ~BIT(bank_pin_num); in zynq_gpio_set_irq_type() 544 int_type &= ~BIT(bank_pin_num); in zynq_gpio_set_irq_type() 551 writel_relaxed(int_type, in zynq_gpio_set_irq_type() 691 gpio->context.int_type[bank_num] = in zynq_gpio_save_context() [all …]
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| A D | gpio-rockchip.c | 45 .int_type = 0x38, 59 .int_type = 0x20, 417 level = rockchip_gpio_readl(bank, bank->gpio_regs->int_type); in rockchip_irq_set_type() 469 rockchip_gpio_writel(bank, level, bank->gpio_regs->int_type); in rockchip_irq_set_type()
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| A D | gpio-npcm-sgpio.c | 69 u8 int_type[MAX_NR_HW_SGPIO]; member 334 type = gpio->int_type[offset]; in npcm_sgpio_irq_set_mask() 414 gpio->int_type[offset] = val; in npcm_sgpio_set_type()
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| A D | gpio-dwapb.c | 89 u32 int_type; member 777 ctx->int_type = dwapb_read(gpio, GPIO_INTTYPE_LEVEL); in dwapb_gpio_suspend() 821 dwapb_write(gpio, GPIO_INTTYPE_LEVEL, ctx->int_type); in dwapb_gpio_resume()
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| /drivers/dma/ |
| A D | sprd-dma.c | 203 enum sprd_dma_int_type int_type; member 444 if (schan->int_type != SPRD_DMA_NO_INT) in sprd_dma_set_2stage_config() 454 if (schan->int_type != SPRD_DMA_NO_INT) in sprd_dma_set_2stage_config() 464 if (schan->int_type != SPRD_DMA_NO_INT) in sprd_dma_set_2stage_config() 474 if (schan->int_type != SPRD_DMA_NO_INT) in sprd_dma_set_2stage_config() 578 if (int_type == SPRD_DMA_NO_INT) in sprd_dma_check_trans_done() 581 if (int_type >= req_mode + 1) in sprd_dma_check_trans_done() 594 enum sprd_dma_int_type int_type; in dma_irq_handle() local 611 int_type = sprd_dma_get_int_type(schan); in dma_irq_handle() 621 trans_done = sprd_dma_check_trans_done(int_type, req_type); in dma_irq_handle() [all …]
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| /drivers/net/ethernet/cavium/thunder/ |
| A D | nicvf_queues.h | 354 void nicvf_enable_intr(struct nicvf *nic, int int_type, int q_idx); 355 void nicvf_disable_intr(struct nicvf *nic, int int_type, int q_idx); 356 void nicvf_clear_intr(struct nicvf *nic, int int_type, int q_idx); 357 int nicvf_is_intr_enabled(struct nicvf *nic, int int_type, int q_idx);
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| A D | nicvf_queues.c | 1723 static u64 nicvf_int_type_to_mask(int int_type, int q_idx) in nicvf_int_type_to_mask() argument 1727 switch (int_type) { in nicvf_int_type_to_mask() 1757 void nicvf_enable_intr(struct nicvf *nic, int int_type, int q_idx) in nicvf_enable_intr() argument 1759 u64 mask = nicvf_int_type_to_mask(int_type, q_idx); in nicvf_enable_intr() 1771 void nicvf_disable_intr(struct nicvf *nic, int int_type, int q_idx) in nicvf_disable_intr() argument 1773 u64 mask = nicvf_int_type_to_mask(int_type, q_idx); in nicvf_disable_intr() 1785 void nicvf_clear_intr(struct nicvf *nic, int int_type, int q_idx) in nicvf_clear_intr() argument 1787 u64 mask = nicvf_int_type_to_mask(int_type, q_idx); in nicvf_clear_intr() 1799 int nicvf_is_intr_enabled(struct nicvf *nic, int int_type, int q_idx) in nicvf_is_intr_enabled() argument 1801 u64 mask = nicvf_int_type_to_mask(int_type, q_idx); in nicvf_is_intr_enabled()
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| /drivers/media/platform/mediatek/vcodec/common/ |
| A D | mtk_vcodec_intr.c | 31 ctx_int_type = ctx->int_type; in mtk_vcodec_wait_for_done_ctx() 41 ctx_int_type = ctx->int_type; in mtk_vcodec_wait_for_done_ctx()
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| /drivers/mfd/ |
| A D | rc5t583-irq.c | 16 enum int_type { enum 77 u8 int_type; member 87 .int_type = _int_type, \ 180 if ((data->int_type & GPIO_INT) && (type & IRQ_TYPE_EDGE_BOTH)) { in rc5t583_irq_set_type()
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| /drivers/media/platform/mediatek/vcodec/encoder/ |
| A D | mtk_vcodec_enc_drv.h | 145 int int_type[MTK_VDEC_HW_MAX]; member 235 ctx->int_type[hw_id] = reason; in wake_up_enc_ctx()
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| /drivers/clocksource/ |
| A D | exynos_mct.c | 538 unsigned int int_type, in exynos4_timer_interrupts() argument 544 mct_int_type = int_type; in exynos4_timer_interrupts() 641 static int __init mct_init_dt(struct device_node *np, unsigned int int_type) in mct_init_dt() argument 671 ret = exynos4_timer_interrupts(np, int_type, local_idx, nr_local); in mct_init_dt()
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| /drivers/media/platform/mediatek/vcodec/decoder/ |
| A D | mtk_vcodec_dec_drv.h | 198 int int_type[MTK_VDEC_HW_MAX]; member 327 ctx->int_type[hw_id] = reason; in wake_up_dec_ctx()
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| /drivers/spi/ |
| A D | spi-sg2044-nor.c | 101 static int sg2044_spifmc_wait_int(struct sg2044_spifmc *spifmc, u8 int_type) in sg2044_spifmc_wait_int() argument 106 (stat & int_type), 0, 1000000); in sg2044_spifmc_wait_int()
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