| /drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/ |
| A D | dce_clk_mgr.c | 283 if (bp->integrated_info) in dce_clock_read_integrated_info()
284 clk_mgr_dce->base.dentist_vco_freq_khz = bp->integrated_info->dentist_vco_freq; in dce_clock_read_integrated_info()
319 if (bp->integrated_info) in dce_clock_read_integrated_info()
320 if (bp->integrated_info->disp_clk_voltage[i].max_supported_clk >= 100000) in dce_clock_read_integrated_info()
322 bp->integrated_info->disp_clk_voltage[i].max_supported_clk; in dce_clock_read_integrated_info()
325 if (!debug->disable_dfs_bypass && bp->integrated_info) in dce_clock_read_integrated_info()
326 if (bp->integrated_info->gpu_cap_info & DFS_BYPASS_ENABLE) in dce_clock_read_integrated_info()
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| /drivers/gpu/drm/amd/display/dc/link/ |
| A D | link_dpms.c | 231 struct integrated_info *integrated_info = in get_ext_hdmi_settings() local
232 pipe_ctx->stream->ctx->dc_bios->integrated_info; in get_ext_hdmi_settings()
234 if (integrated_info == NULL) in get_ext_hdmi_settings()
244 if (integrated_info->gpu_cap_info & 0x20) { in get_ext_hdmi_settings()
251 integrated_info->dp0_ext_hdmi_reg_settings, in get_ext_hdmi_settings()
254 integrated_info->dp0_ext_hdmi_6g_reg_settings, in get_ext_hdmi_settings()
263 integrated_info->dp1_ext_hdmi_reg_settings, in get_ext_hdmi_settings()
266 integrated_info->dp1_ext_hdmi_6g_reg_settings, in get_ext_hdmi_settings()
275 integrated_info->dp2_ext_hdmi_reg_settings, in get_ext_hdmi_settings()
278 integrated_info->dp2_ext_hdmi_6g_reg_settings, in get_ext_hdmi_settings()
[all …]
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| A D | link_factory.c | 685 if (bios->integrated_info) { in construct_phy()
689 &bios->integrated_info->ext_disp_conn_info.path[i]; in construct_phy()
714 (bios->integrated_info->ext_disp_conn_info.fixdpvoltageswing & 0x3); in construct_phy()
716 ((bios->integrated_info->ext_disp_conn_info.fixdpvoltageswing >> 2) & 0x3); in construct_phy()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
| A D | rv1_clk_mgr.c | 333 if (bp->integrated_info) in rv1_clk_mgr_construct()
334 clk_mgr->base.dentist_vco_freq_khz = bp->integrated_info->dentist_vco_freq; in rv1_clk_mgr_construct()
341 if (!debug->disable_dfs_bypass && bp->integrated_info) in rv1_clk_mgr_construct()
342 if (bp->integrated_info->gpu_cap_info & DFS_BYPASS_ENABLE) in rv1_clk_mgr_construct()
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| /drivers/gpu/drm/amd/display/dc/ |
| A D | dc_bios_types.h | 182 struct integrated_info *integrated_info; member
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/ |
| A D | dcn201_clk_mgr.c | 212 if (!debug->disable_dfs_bypass && bp->integrated_info) in dcn201_clk_mgr_construct()
213 if (bp->integrated_info->gpu_cap_info & DFS_BYPASS_ENABLE) in dcn201_clk_mgr_construct()
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| /drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_clk_mgr.c | 347 struct integrated_info info = { { { 0 } } }; in dce_clock_read_integrated_info()
351 if (bp->integrated_info) in dce_clock_read_integrated_info()
352 info = *bp->integrated_info; in dce_clock_read_integrated_info()
396 if (!debug->disable_dfs_bypass && bp->integrated_info) in dce_clock_read_integrated_info()
397 if (bp->integrated_info->gpu_cap_info & DFS_BYPASS_ENABLE) in dce_clock_read_integrated_info()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
| A D | dcn316_clk_mgr.c | 484 struct integrated_info *bios_info, in dcn316_clk_mgr_helper_populate_bw_params()
639 if (ctx->dc_bios->integrated_info->memory_type == LpDdr5MemType) { in dcn316_clk_mgr_construct()
660 if (ctx->dc_bios->integrated_info) { in dcn316_clk_mgr_construct()
663 ctx->dc_bios->integrated_info, in dcn316_clk_mgr_construct()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
| A D | rn_clk_mgr.c | 640 …struct clk_bw_params *bw_params, struct dpm_clocks *clock_table, struct integrated_info *bios_info) in rn_clk_mgr_helper_populate_bw_params()
743 if (ctx->dc_bios->integrated_info->memory_type == LpDdr4MemType) { in rn_clk_mgr_construct()
775 ctx->dc_bios->integrated_info) { in rn_clk_mgr_construct()
776 …r_helper_populate_bw_params (clk_mgr->base.bw_params, &clock_table, ctx->dc_bios->integrated_info); in rn_clk_mgr_construct()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| A D | vg_clk_mgr.c | 561 struct integrated_info *bios_info, in vg_clk_mgr_helper_populate_bw_params()
720 if (ctx->dc_bios->integrated_info->memory_type == LpDdr5MemType) { in vg_clk_mgr_construct()
734 if (ctx->dc_bios->integrated_info) { in vg_clk_mgr_construct()
737 ctx->dc_bios->integrated_info, in vg_clk_mgr_construct()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
| A D | dcn315_clk_mgr.c | 483 struct integrated_info *bios_info, in dcn315_clk_mgr_helper_populate_bw_params()
656 if (ctx->dc_bios->integrated_info->memory_type == LpDdr5MemType) { in dcn315_clk_mgr_construct()
717 if (ctx->dc_bios->integrated_info) { in dcn315_clk_mgr_construct()
720 ctx->dc_bios->integrated_info, in dcn315_clk_mgr_construct()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| A D | dcn31_clk_mgr.c | 557 struct integrated_info *bios_info, in dcn31_clk_mgr_helper_populate_bw_params()
728 if (ctx->dc_bios->integrated_info->memory_type == LpDdr5MemType) { in dcn31_clk_mgr_construct()
789 if (ctx->dc_bios->integrated_info) { in dcn31_clk_mgr_construct()
792 ctx->dc_bios->integrated_info, in dcn31_clk_mgr_construct()
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| /drivers/gpu/drm/amd/display/dc/bios/ |
| A D | bios_parser2.c | 97 kfree(bp->base.integrated_info); in bios_parser2_destruct()
1021 if (bp->base.integrated_info) { in get_ss_info_v4_5()
1024 bp->base.integrated_info->gpuclk_ss_percentage; in get_ss_info_v4_5()
1026 bp->base.integrated_info->gpuclk_ss_type; in get_ss_info_v4_5()
2511 struct integrated_info *info) in get_integrated_info_v11()
2728 struct integrated_info *info) in get_integrated_info_v2_1()
2890 struct integrated_info *info) in get_integrated_info_v2_2()
3010 struct integrated_info *info) in construct_integrated_info()
3204 static struct integrated_info *bios_parser_create_integrated_info( in bios_parser_create_integrated_info()
3208 struct integrated_info *info; in bios_parser_create_integrated_info()
[all …]
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| A D | bios_parser.c | 114 kfree(bp->base.integrated_info); in bios_parser_destruct()
2252 struct integrated_info *info) in get_integrated_info_v8()
2402 struct integrated_info *info) in get_integrated_info_v9()
2539 struct integrated_info *info) in construct_integrated_info()
2588 static struct integrated_info *bios_parser_create_integrated_info( in bios_parser_create_integrated_info()
2592 struct integrated_info *info; in bios_parser_create_integrated_info()
2594 info = kzalloc(sizeof(struct integrated_info), GFP_KERNEL); in bios_parser_create_integrated_info()
2942 bp->base.integrated_info = bios_parser_create_integrated_info(&bp->base); in bios_parser_construct()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| A D | dcn314_clk_mgr.c | 618 struct integrated_info *bios_info, in dcn314_clk_mgr_helper_populate_bw_params()
838 if (ctx->dc_bios->integrated_info->memory_type == LpDdr5MemType) in dcn314_clk_mgr_construct()
899 if (ctx->dc_bios->integrated_info && ctx->dc->config.use_default_clock_table == false) { in dcn314_clk_mgr_construct()
902 ctx->dc_bios->integrated_info, in dcn314_clk_mgr_construct()
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| /drivers/gpu/drm/amd/display/include/ |
| A D | grph_object_ctrl_defs.h | 299 struct integrated_info { struct
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| A D | dcn35_clk_mgr.c | 902 struct integrated_info *bios_info, in dcn35_clk_mgr_helper_populate_bw_params()
1320 if (ctx->dc_bios->integrated_info->memory_type == LpDdr5MemType) { in dcn35_clk_mgr_construct()
1393 if (ctx->dc_bios->integrated_info && ctx->dc->config.use_default_clock_table == false) { in dcn35_clk_mgr_construct()
1396 ctx->dc_bios->integrated_info, in dcn35_clk_mgr_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn201/ |
| A D | dcn201_resource.c | 1059 if (link->ctx->dc_bios->integrated_info) in dcn201_link_init()
1060 link->dp_ss_off = !link->ctx->dc_bios->integrated_info->dp_ss_control; in dcn201_link_init()
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