| /drivers/gpu/drm/i915/display/ |
| A D | vlv_dsi.c | 165 if (intel_de_wait_for_clear(display, MIPI_GEN_FIFO_STAT(display, port), in intel_dsi_host_transfer()
179 if (intel_de_wait_for_clear(display, MIPI_GEN_FIFO_STAT(display, port), in intel_dsi_host_transfer()
397 if (intel_de_wait_for_clear(display, MIPI_CTRL(display, port), in glk_dsi_device_ready()
522 if (intel_de_wait_for_clear(display, MIPI_CTRL(display, port), in glk_dsi_enter_low_power_mode()
529 if (intel_de_wait_for_clear(display, MIPI_CTRL(display, port), in glk_dsi_enter_low_power_mode()
547 if (intel_de_wait_for_clear(display, MIPI_CTRL(display, port), in glk_dsi_disable_mipi_io()
598 intel_de_wait_for_clear(display, port_ctrl, in vlv_dsi_clear_device_ready()
|
| A D | intel_pmdemand.c | 392 return !(intel_de_wait_for_clear(display, in intel_pmdemand_check_prev_transaction()
395 intel_de_wait_for_clear(display, in intel_pmdemand_check_prev_transaction()
|
| A D | intel_crt.c | 500 if (intel_de_wait_for_clear(display, in ilk_crt_detect_hotplug()
555 if (intel_de_wait_for_clear(display, crt->adpa_reg, in valleyview_crt_detect_hotplug()
606 if (intel_de_wait_for_clear(display, PORT_HOTPLUG_EN(display), in intel_crt_detect_hotplug()
|
| A D | intel_de.h | 185 intel_de_wait_for_clear(struct intel_display *display, i915_reg_t reg, in intel_de_wait_for_clear() function
|
| A D | intel_pch_display.c | 329 if (intel_de_wait_for_clear(display, reg, TRANS_STATE_ENABLE, 50)) in ilk_disable_pch_transcoder()
584 if (intel_de_wait_for_clear(display, LPT_TRANSCONF, in lpt_disable_pch_transcoder()
|
| A D | hsw_ips.c | 81 if (intel_de_wait_for_clear(display, IPS_CTL, IPS_ENABLE, 100)) in hsw_ips_disable()
|
| A D | intel_vrr.c | 641 intel_de_wait_for_clear(display, in intel_vrr_disable()
689 intel_de_wait_for_clear(display, TRANS_VRR_STATUS(display, cpu_transcoder), in intel_vrr_transcoder_disable()
|
| A D | intel_lvds.c | 347 if (intel_de_wait_for_clear(display, PP_STATUS(display, 0), PP_ON, 1000)) in intel_disable_lvds()
386 if (intel_de_wait_for_clear(display, PP_STATUS(display, 0), PP_CYCLE_DELAY_ACTIVE, 5000)) in intel_lvds_shutdown()
|
| A D | intel_cx0_phy.c | 152 if (intel_de_wait_for_clear(display, XELPDP_PORT_M2P_MSGBUS_CTL(display, port, lane), in intel_cx0_bus_reset()
221 if (intel_de_wait_for_clear(display, XELPDP_PORT_M2P_MSGBUS_CTL(display, port, lane), in __intel_cx0_read_once()
293 if (intel_de_wait_for_clear(display, XELPDP_PORT_M2P_MSGBUS_CTL(display, port, lane), in __intel_cx0_write_once()
309 if (intel_de_wait_for_clear(display, XELPDP_PORT_M2P_MSGBUS_CTL(display, port, lane), in __intel_cx0_write_once()
2826 if (intel_de_wait_for_clear(display, XELPDP_PORT_M2P_MSGBUS_CTL(display, port, lane), in intel_cx0_powerdown_change_sequence()
2937 if (intel_de_wait_for_clear(display, XELPDP_PORT_BUF_CTL2(display, port), in intel_cx0_phy_lane_reset()
|
| A D | intel_flipq.c | 166 intel_de_wait_for_clear(display, in intel_flipq_preempt()
|
| A D | vlv_dsi_pll.c | 316 if (intel_de_wait_for_clear(display, BXT_DSI_PLL_ENABLE, in bxt_dsi_pll_disable()
|
| A D | intel_psr.c | 2138 if (intel_de_wait_for_clear(display, psr_status, in intel_psr_wait_exit_locked()
3016 return intel_de_wait_for_clear(display, in _psr2_ready_for_pipe_update_locked()
3032 return intel_de_wait_for_clear(display, in _psr1_ready_for_pipe_update_locked()
3095 err = intel_de_wait_for_clear(display, reg, mask, 50); in __psr_wait_for_idle_locked()
|
| A D | intel_display_power_well.c | 337 ret = intel_de_wait_for_clear(display, regs->driver, in hsw_wait_for_power_well_disable()
1905 if (intel_de_wait_for_clear(display, XE2LPD_PICA_PW_CTL, in xe2lpd_pica_power_well_disable()
|
| A D | intel_tc.c | 1022 if (intel_de_wait_for_clear(display, TCSS_DISP_MAILBOX_IN_CMD, in xelpdp_tc_power_request_wa()
1035 if (intel_de_wait_for_clear(display, TCSS_DISP_MAILBOX_IN_CMD, in xelpdp_tc_power_request_wa()
|
| A D | intel_snps_phy.c | 45 if (intel_de_wait_for_clear(display, DG2_PHY_MISC(phy), in intel_snps_phy_wait_for_calibration()
1906 if (intel_de_wait_for_clear(display, enable_reg, PLL_LOCK, 5)) in intel_mpllb_disable()
|
| A D | intel_cdclk.c | 1128 if (intel_de_wait_for_clear(display, LCPLL1_CTL, LCPLL_PLL_LOCK, 1)) in skl_dpll0_disable()
1800 if (intel_de_wait_for_clear(display, in bxt_de_pll_disable()
1830 if (intel_de_wait_for_clear(display, BXT_DE_PLL_ENABLE, BXT_DE_PLL_LOCK, 1)) in icl_cdclk_pll_disable()
|
| A D | intel_hdcp.c | 1015 if (intel_de_wait_for_clear(display, in _intel_hdcp_disable()
1968 ret = intel_de_wait_for_clear(display, in hdcp2_disable_encryption()
|
| A D | icl_dsi.c | 1300 if (intel_de_wait_for_clear(display, TRANSCONF(display, dsi_trans), in gen11_dsi_disable_transcoder()
|
| A D | intel_fbc.c | 331 if (intel_de_wait_for_clear(display, FBC_STATUS, in i8xx_fbc_deactivate()
|
| A D | intel_display_power.c | 1301 if (intel_de_wait_for_clear(display, LCPLL_CTL, LCPLL_PLL_LOCK, 1)) in hsw_disable_lcpll()
|
| A D | intel_dpll_mgr.c | 4041 if (intel_de_wait_for_clear(display, enable_reg, PLL_LOCK, 1)) in icl_pll_disable()
4052 if (intel_de_wait_for_clear(display, enable_reg, PLL_POWER_STATE, 1)) in icl_pll_disable()
|
| A D | intel_ddi.c | 236 if (intel_de_wait_for_clear(display, intel_ddi_buf_status_reg(display, port), in intel_wait_ddi_buf_active()
2390 ret = intel_de_wait_for_clear(display, dp_tp_status_reg(encoder, crtc_state), in intel_ddi_wait_for_fec_status()
|
| A D | intel_display.c | 419 if (intel_de_wait_for_clear(display, TRANSCONF(display, cpu_transcoder), in intel_wait_for_pipe_off()
|