| /drivers/gpu/drm/i915/gt/ |
| A D | intel_rc6.c | 80 intel_uncore_write_fw(uncore, GEN6_RC_SLEEP, 0); in gen11_rc6_enable() 162 intel_uncore_write_fw(uncore, GEN6_RC_SLEEP, 0); in gen9_rc6_enable() 201 intel_uncore_write_fw(uncore, GEN9_PG_ENABLE, in gen9_rc6_enable() 217 intel_uncore_write_fw(uncore, GEN6_RC_SLEEP, 0); in gen8_rc6_enable() 245 intel_uncore_write_fw(uncore, GEN6_RC_SLEEP, 0); in gen6_rc6_enable() 369 intel_uncore_write_fw(uncore, GEN6_RC_SLEEP, 0); in chv_rc6_enable() 375 intel_uncore_write_fw(uncore, VLV_COUNTER_CONTROL, in chv_rc6_enable() 400 intel_uncore_write_fw(uncore, VLV_COUNTER_CONTROL, in vlv_rc6_enable() 565 intel_uncore_write_fw(uncore, GEN9_PG_ENABLE, 0); in __intel_rc6_disable() 566 intel_uncore_write_fw(uncore, GEN6_RC_CONTROL, 0); in __intel_rc6_disable() [all …]
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| A D | intel_gt_mcr.c | 223 intel_uncore_write_fw(uncore, MTL_MCR_SELECTOR, in rw_with_mcr_steering_fw() 251 intel_uncore_write_fw(uncore, GEN8_MCR_SELECTOR, mcr); in rw_with_mcr_steering_fw() 261 intel_uncore_write_fw(uncore, GEN8_MCR_SELECTOR, mcr); in rw_with_mcr_steering_fw() 267 intel_uncore_write_fw(uncore, mcr_reg_cast(reg), value); in rw_with_mcr_steering_fw() 276 intel_uncore_write_fw(uncore, MTL_MCR_SELECTOR, GEN11_MCR_MULTICAST); in rw_with_mcr_steering_fw() 278 intel_uncore_write_fw(uncore, GEN8_MCR_SELECTOR, old_mcr); in rw_with_mcr_steering_fw() 395 intel_uncore_write_fw(gt->uncore, MTL_STEER_SEMAPHORE, 0x1); in intel_gt_mcr_unlock() 420 intel_uncore_write_fw(gt->uncore, MTL_STEER_SEMAPHORE, 0x1); in intel_gt_mcr_lock_sanitize() 483 intel_uncore_write_fw(gt->uncore, MTL_MCR_SELECTOR, GEN11_MCR_MULTICAST); in intel_gt_mcr_multicast_write() 512 intel_uncore_write_fw(gt->uncore, MTL_MCR_SELECTOR, GEN11_MCR_MULTICAST); in intel_gt_mcr_multicast_write_fw() [all …]
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| A D | intel_rps.c | 72 intel_uncore_write_fw(uncore, reg, val); in set() 1238 intel_uncore_write_fw(uncore, GEN6_RC_VIDEO_FREQ, in gen9_rps_enable() 1252 intel_uncore_write_fw(uncore, GEN6_RC_VIDEO_FREQ, in gen8_rps_enable() 1255 intel_uncore_write_fw(uncore, GEN6_RP_IDLE_HYSTERSIS, 10); in gen8_rps_enable() 1268 intel_uncore_write_fw(uncore, GEN6_RP_IDLE_HYSTERSIS, 10); in gen6_rps_enable() 1347 intel_uncore_write_fw(uncore, GEN6_RP_UP_EI, 66000); in chv_rps_enable() 1348 intel_uncore_write_fw(uncore, GEN6_RP_DOWN_EI, 350000); in chv_rps_enable() 1353 intel_uncore_write_fw(uncore, GEN6_RP_CONTROL, in chv_rps_enable() 1450 intel_uncore_write_fw(uncore, GEN6_RP_UP_EI, 66000); in vlv_rps_enable() 1451 intel_uncore_write_fw(uncore, GEN6_RP_DOWN_EI, 350000); in vlv_rps_enable() [all …]
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| A D | intel_tlb.c | 76 intel_uncore_write_fw(uncore, in mmio_invalidate_full() 92 intel_uncore_write_fw(uncore, GEN12_OA_TLB_INV_CR, 1); in mmio_invalidate_full()
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| A D | intel_ggtt_fencing.c | 104 intel_uncore_write_fw(uncore, fence_reg_lo, 0); in i965_write_fence_reg() 107 intel_uncore_write_fw(uncore, fence_reg_hi, upper_32_bits(val)); in i965_write_fence_reg() 108 intel_uncore_write_fw(uncore, fence_reg_lo, lower_32_bits(val)); in i965_write_fence_reg() 142 intel_uncore_write_fw(uncore, reg, val); in i915_write_fence_reg() 167 intel_uncore_write_fw(uncore, reg, val); in i830_write_fence_reg()
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| A D | intel_reset.c | 240 intel_uncore_write_fw(uncore, ILK_GDSR, in ilk_do_reset() 251 intel_uncore_write_fw(uncore, ILK_GDSR, in ilk_do_reset() 263 intel_uncore_write_fw(uncore, ILK_GDSR, 0); in ilk_do_reset() 299 intel_uncore_write_fw(uncore, GEN6_GDRST, hw_domain_mask); in gen6_hw_domain_reset() 592 intel_uncore_write_fw(uncore, reg, _MASKED_BIT_ENABLE(request)); in gen8_engine_reset_prepare() 606 intel_uncore_write_fw(engine->uncore, in gen8_engine_reset_cancel()
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| A D | selftest_rps.c | 278 intel_uncore_write_fw(gt->uncore, GEN6_RP_CUR_UP_EI, 0); in live_rps_clock_interval() 281 intel_uncore_write_fw(gt->uncore, in live_rps_clock_interval() 283 intel_uncore_write_fw(gt->uncore, in live_rps_clock_interval() 286 intel_uncore_write_fw(gt->uncore, GEN6_RP_CONTROL, in live_rps_clock_interval() 322 intel_uncore_write_fw(gt->uncore, GEN6_RP_CONTROL, 0); in live_rps_clock_interval()
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| A D | intel_mocs.c | 563 intel_uncore_write_fw(uncore, _MMIO(addr + i * 4), mocs); in __init_mocs_table() 625 intel_uncore_write_fw(gt->uncore, GEN9_LNCFCMOCS(i), l3cc); in init_l3cc_table()
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| A D | intel_ggtt.c | 196 intel_uncore_write_fw(uncore, GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN); in gen6_ggtt_invalidate() 227 intel_uncore_write_fw(uncore, GFX_FLSH_CNTL_GEN6, in gen8_ggtt_invalidate() 251 intel_uncore_write_fw(gt->uncore, in guc_ggtt_invalidate() 255 intel_uncore_write_fw(gt->uncore, in guc_ggtt_invalidate()
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| A D | intel_ring_submission.c | 113 intel_uncore_write_fw(engine->uncore, hwsp, offset); in set_hwsp() 1054 intel_uncore_write_fw(uncore, RING_PSMI_CTL(GEN6_BSD_RING_BASE), in gen6_bsd_submit_request() 1075 intel_uncore_write_fw(uncore, RING_PSMI_CTL(GEN6_BSD_RING_BASE), in gen6_bsd_submit_request()
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| A D | intel_engine_cs.c | 1633 intel_uncore_write_fw(uncore, mode, _MASKED_BIT_ENABLE(STOP_RING)); in __intel_engine_stop_cs() 1640 intel_uncore_write_fw(uncore, RING_MODE_GEN7(engine->mmio_base), in __intel_engine_stop_cs()
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| A D | intel_workarounds.c | 1763 intel_uncore_write_fw(uncore, wa->reg, val); in wa_list_apply()
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| /drivers/gpu/drm/i915/ |
| A D | vlv_iosf_sb.c | 107 intel_uncore_write_fw(uncore, VLV_IOSF_ADDR, addr); in vlv_sideband_rw() 108 intel_uncore_write_fw(uncore, VLV_IOSF_DATA, is_read ? 0 : *val); in vlv_sideband_rw() 109 intel_uncore_write_fw(uncore, VLV_IOSF_DOORBELL_REQ, in vlv_sideband_rw()
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| A D | intel_pcode.c | 71 intel_uncore_write_fw(uncore, GEN6_PCODE_DATA, *val); in __snb_pcode_rw() 72 intel_uncore_write_fw(uncore, GEN6_PCODE_DATA1, val1 ? *val1 : 0); in __snb_pcode_rw() 73 intel_uncore_write_fw(uncore, in __snb_pcode_rw()
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| A D | intel_uncore.h | 432 #define intel_uncore_write_fw(...) __raw_uncore_write32(__VA_ARGS__) macro 455 intel_uncore_write_fw(uncore, reg, val); in intel_uncore_rmw_fw()
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| A D | intel_uncore.c | 2654 intel_uncore_write_fw(uncore, GU_DEBUG, DRIVERFLR_STATUS); in driver_initiated_flr() 2678 intel_uncore_write_fw(uncore, GU_DEBUG, DRIVERFLR_STATUS); in driver_initiated_flr()
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| /drivers/gpu/drm/i915/gvt/ |
| A D | mmio_context.c | 394 intel_uncore_write_fw(uncore, reg, 0x1); in handle_tlb_pending_event() 443 intel_uncore_write_fw(uncore, offset, new_v); in switch_mocs() 461 intel_uncore_write_fw(uncore, l3_offset, new_v); in switch_mocs() 544 intel_uncore_write_fw(uncore, mmio->reg, new_v); in switch_mmio()
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| /drivers/gpu/drm/i915/gt/uc/ |
| A D | intel_uc_fw.c | 1100 intel_uncore_write_fw(uncore, DMA_ADDR_0_LOW, lower_32_bits(offset)); in uc_fw_xfer() 1101 intel_uncore_write_fw(uncore, DMA_ADDR_0_HIGH, upper_32_bits(offset)); in uc_fw_xfer() 1104 intel_uncore_write_fw(uncore, DMA_ADDR_1_LOW, dst_offset); in uc_fw_xfer() 1105 intel_uncore_write_fw(uncore, DMA_ADDR_1_HIGH, DMA_ADDRESS_SPACE_WOPCM); in uc_fw_xfer() 1111 intel_uncore_write_fw(uncore, DMA_COPY_SIZE, in uc_fw_xfer() 1115 intel_uncore_write_fw(uncore, DMA_CTRL, in uc_fw_xfer() 1126 intel_uncore_write_fw(uncore, DMA_CTRL, _MASKED_BIT_DISABLE(dma_flags)); in uc_fw_xfer()
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| A D | intel_guc.c | 971 intel_uncore_write_fw(gt->uncore, GEN11_SOFT_SCRATCH(0), 0); in intel_guc_write_barrier()
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| /drivers/gpu/drm/xe/compat-i915-headers/ |
| A D | intel_uncore.h | 144 static inline void intel_uncore_write_fw(struct intel_uncore *uncore, in intel_uncore_write_fw() function
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| /drivers/gpu/drm/i915/display/ |
| A D | intel_de.h | 214 intel_uncore_write_fw(__to_uncore(display), reg, val); in intel_de_write_fw()
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| /drivers/gpu/drm/i915/selftests/ |
| A D | i915_selftest.c | 274 intel_uncore_write_fw(uncore, GEN9_PG_ENABLE, in i915_live_selftests()
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