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Searched refs:interdependent_update_lock (Results 1 – 15 of 15) sorted by relevance

/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
A Ddcn10_init.c59 .interdependent_update_lock = dcn10_lock_all_pipes,
/drivers/gpu/drm/amd/display/dc/hwss/dcn201/
A Ddcn201_init.c59 .interdependent_update_lock = dcn10_lock_all_pipes,
/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
A Ddcn20_init.c60 .interdependent_update_lock = dcn10_lock_all_pipes,
/drivers/gpu/drm/amd/display/dc/hwss/dcn301/
A Ddcn301_init.c62 .interdependent_update_lock = dcn10_lock_all_pipes,
/drivers/gpu/drm/amd/display/dc/hwss/dcn21/
A Ddcn21_init.c60 .interdependent_update_lock = dcn10_lock_all_pipes,
/drivers/gpu/drm/amd/display/dc/hwss/dcn30/
A Ddcn30_init.c61 .interdependent_update_lock = dcn10_lock_all_pipes,
/drivers/gpu/drm/amd/display/dc/hwss/dcn314/
A Ddcn314_init.c66 .interdependent_update_lock = dcn10_lock_all_pipes,
/drivers/gpu/drm/amd/display/dc/hwss/dcn31/
A Ddcn31_init.c64 .interdependent_update_lock = dcn10_lock_all_pipes,
/drivers/gpu/drm/amd/display/dc/hwss/dcn351/
A Ddcn351_init.c67 .interdependent_update_lock = dcn10_lock_all_pipes,
/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
A Ddcn401_init.c42 .interdependent_update_lock = dcn401_interdependent_update_lock,
/drivers/gpu/drm/amd/display/dc/hwss/dcn32/
A Ddcn32_init.c63 .interdependent_update_lock = dcn32_interdependent_update_lock,
/drivers/gpu/drm/amd/display/dc/hwss/dcn35/
A Ddcn35_init.c68 .interdependent_update_lock = dcn10_lock_all_pipes,
/drivers/gpu/drm/amd/display/dc/core/
A Ddc.c1188 if (dc->hwss.interdependent_update_lock) in apply_ctx_interdependent_lock()
1189 dc->hwss.interdependent_update_lock(dc, context, lock); in apply_ctx_interdependent_lock()
1377 dc->hwss.interdependent_update_lock(dc, dc->current_state, true); in disable_dangling_plane()
2193 dc->hwss.interdependent_update_lock(dc, context, true); in dc_commit_state_no_check()
2203 dc->hwss.interdependent_update_lock(dc, context, false); in dc_commit_state_no_check()
4141 if (should_lock_all_pipes && dc->hwss.interdependent_update_lock) { in commit_planes_for_stream()
4148 dc->hwss.interdependent_update_lock(dc, context, true); in commit_planes_for_stream()
4180 dc->hwss.interdependent_update_lock(dc, context, false); in commit_planes_for_stream()
4369 if (should_lock_all_pipes && dc->hwss.interdependent_update_lock) { in commit_planes_for_stream()
4370 dc->hwss.interdependent_update_lock(dc, context, false); in commit_planes_for_stream()
[all …]
/drivers/gpu/drm/amd/display/dc/hwss/
A Dhw_sequencer.h253 void (*interdependent_update_lock)(struct dc *dc, member
/drivers/gpu/drm/amd/display/dc/hwss/dce110/
A Ddce110_hwseq.c3379 .interdependent_update_lock = NULL,

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