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Searched refs:interrupts (Results 1 – 25 of 131) sorted by relevance

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/drivers/of/unittest-data/
A Dtests-interrupts.dtsi5 interrupts {
62 interrupts = <1>, <2>, <3>, <4>;
67 interrupts = <1>, <2>, <3>, <4>;
73 interrupts = <1>;
76 interrupts-extended0 {
82 interrupts-extended = <&test_intc0 1>,
95 interrupts = <1>;
/drivers/iio/cdc/
A Dad7150.c86 int interrupts[2]; member
251 disable_irq(chip->interrupts[chan->channel]); in ad7150_write_event_config()
269 disable_irq(chip->interrupts[0]); in ad7150_write_event_config()
270 disable_irq(chip->interrupts[1]); in ad7150_write_event_config()
310 enable_irq(chip->interrupts[0]); in ad7150_write_event_config()
311 enable_irq(chip->interrupts[1]); in ad7150_write_event_config()
314 enable_irq(chip->interrupts[chan->channel]); in ad7150_write_event_config()
564 if (chip->interrupts[0] < 0) in ad7150_probe()
568 if (chip->interrupts[1] < 0) in ad7150_probe()
574 chip->interrupts[0], in ad7150_probe()
[all …]
/drivers/net/ethernet/8390/
A Dlib8390.c431 int interrupts, nr_serviced = 0; in __ei_interrupt() local
463 ei_outb_p(interrupts, e8390_base + EN0_ISR); in __ei_interrupt()
464 interrupts = 0; in __ei_interrupt()
467 if (interrupts & ENISR_OVER) in __ei_interrupt()
474 if (interrupts & ENISR_TX) in __ei_interrupt()
476 else if (interrupts & ENISR_TX_ERR) in __ei_interrupt()
479 if (interrupts & ENISR_COUNTERS) { in __ei_interrupt()
487 if (interrupts & ENISR_RDC) in __ei_interrupt()
493 if (interrupts && (netif_msg_intr(ei_local))) { in __ei_interrupt()
497 if (interrupts != 0xFF) in __ei_interrupt()
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A Daxnet_cs.c1092 int interrupts, nr_serviced = 0, i; in ax_interrupt() local
1136 outb_p(interrupts, e8390_base + EN0_ISR); in ax_interrupt()
1137 interrupts = 0; in ax_interrupt()
1143 outb_p(interrupts, e8390_base + EN0_ISR); in ax_interrupt()
1150 if (interrupts & ENISR_OVER) in ax_interrupt()
1158 if (interrupts & ENISR_TX) in ax_interrupt()
1160 else if (interrupts & ENISR_TX_ERR) in ax_interrupt()
1163 if (interrupts & ENISR_COUNTERS) in ax_interrupt()
1177 if (interrupts != 0xFF) in ax_interrupt()
1180 interrupts); in ax_interrupt()
[all …]
/drivers/memory/
A Demif.c581 u32 interrupts; in emif_interrupt_handler() local
596 if (interrupts & TA_SYS_MASK) in emif_interrupt_handler()
599 if (interrupts & ERR_SYS_MASK) in emif_interrupt_handler()
604 interrupts = readl(base + EMIF_LL_OCP_INTERRUPT_STATUS); in emif_interrupt_handler()
605 writel(interrupts, base + EMIF_LL_OCP_INTERRUPT_STATUS); in emif_interrupt_handler()
607 if (interrupts & ERR_LL_MASK) in emif_interrupt_handler()
609 interrupts); in emif_interrupt_handler()
675 u32 interrupts, type; in setup_interrupts() local
683 interrupts = EN_ERR_SYS_MASK; in setup_interrupts()
685 interrupts |= EN_TA_SYS_MASK; in setup_interrupts()
[all …]
/drivers/acpi/acpica/
A Drsirq.c27 {ACPI_RSC_BITMASK16, ACPI_RS_OFFSET(data.irq.interrupts[0]),
81 {ACPI_RSC_BITMASK16, ACPI_RS_OFFSET(data.irq.interrupts[0]),
197 {ACPI_RSC_MOVE32, ACPI_RS_OFFSET(data.extended_irq.interrupts[0]),
198 AML_OFFSET(extended_irq.interrupts[0]),
204 ACPI_RS_OFFSET(data.extended_irq.interrupts[0]),
/drivers/acpi/
A Dpci_link.c106 if (!p->interrupts[i]) { in acpi_pci_link_check_possible()
109 p->interrupts[i]); in acpi_pci_link_check_possible()
112 link->irq.possible[i] = p->interrupts[i]; in acpi_pci_link_check_possible()
132 if (!p->interrupts[i]) { in acpi_pci_link_check_possible()
135 p->interrupts[i]); in acpi_pci_link_check_possible()
138 link->irq.possible[i] = p->interrupts[i]; in acpi_pci_link_check_possible()
193 *irq = p->interrupts[0]; in acpi_pci_link_check_current()
208 *irq = p->interrupts[0]; in acpi_pci_link_check_current()
311 resource->res.data.irq.interrupts[0] = irq; in acpi_pci_link_set()
329 resource->res.data.extended_irq.interrupts[0] = irq; in acpi_pci_link_set()
A Dirq.c212 fwnode = acpi_get_gsi_domain_id(irq->interrupts[ctx->index]); in acpi_irq_parse_one_cb()
213 acpi_irq_parse_one_match(fwnode, irq->interrupts[ctx->index], in acpi_irq_parse_one_cb()
226 eirq->interrupts[ctx->index]); in acpi_irq_parse_one_cb()
227 acpi_irq_parse_one_match(fwnode, eirq->interrupts[ctx->index], in acpi_irq_parse_one_cb()
A Devged.c93 gsi = p->interrupts[0]; in acpi_ged_request_interrupt()
96 gsi = pext->interrupts[0]; in acpi_ged_request_interrupt()
/drivers/thermal/ti-soc-thermal/
A DKconfig9 This includes alert interrupts generation and also the TSHUT
48 This includes alert interrupts generation and also the TSHUT
60 This includes alert interrupts generation and also the TSHUT
72 This includes alert interrupts generation and also the TSHUT
/drivers/gpu/drm/i915/gt/uc/
A Dintel_guc.c104 guc->interrupts.enabled = true; in gen9_enable_guc_interrupts()
112 guc->interrupts.enabled = false; in gen9_disable_guc_interrupts()
149 guc->interrupts.enabled = true; in gen11_enable_guc_interrupts()
156 guc->interrupts.enabled = false; in gen11_disable_guc_interrupts()
194 guc->interrupts.reset = gen11_reset_guc_interrupts; in intel_guc_init_early()
195 guc->interrupts.enable = gen11_enable_guc_interrupts; in intel_guc_init_early()
196 guc->interrupts.disable = gen11_disable_guc_interrupts; in intel_guc_init_early()
209 guc->interrupts.reset = gen9_reset_guc_interrupts; in intel_guc_init_early()
210 guc->interrupts.enable = gen9_enable_guc_interrupts; in intel_guc_init_early()
211 guc->interrupts.disable = gen9_disable_guc_interrupts; in intel_guc_init_early()
A Dintel_guc.h100 } interrupts; member
396 if (guc->interrupts.enabled) in intel_guc_to_host_event_handler()
475 guc->interrupts.reset(guc); in intel_guc_reset_interrupts()
480 guc->interrupts.enable(guc); in intel_guc_enable_interrupts()
485 guc->interrupts.disable(guc); in intel_guc_disable_interrupts()
/drivers/ntb/
A DKconfig21 hardware doorbells. MSI interrupts typically offer lower latency
22 than doorbells and more MSI interrupts can be made available to
24 in the hardware driver for creating the MSI interrupts.
/drivers/pinctrl/starfive/
A DKconfig18 and interrupts on input changes.
39 and interrupts on input changes.
51 and interrupts on input changes.
/drivers/char/tpm/
A Dtpm_tis.c90 static bool interrupts; variable
91 module_param(interrupts, bool, 0444);
92 MODULE_PARM_DESC(interrupts, "Enable interrupts");
239 if (interrupts) in tpm_tis_init()
/drivers/gpu/drm/i915/pxp/
A Dintel_pxp_irq.c54 static inline void __pxp_set_interrupts(struct intel_gt *gt, u32 interrupts) in __pxp_set_interrupts() argument
57 const u32 mask = interrupts << 16; in __pxp_set_interrupts()
/drivers/misc/
A Dlan966x_pci.dtso66 interrupts = <0>; /* PCI INTx assigned interrupt */
94 interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
143 interrupts = <12 IRQ_TYPE_LEVEL_HIGH>,
/drivers/gpu/drm/msm/
A Dmsm_mdss.c80 u32 interrupts; in msm_mdss_irq() local
84 interrupts = readl_relaxed(msm_mdss->mmio + REG_MDSS_HW_INTR_STATUS); in msm_mdss_irq()
86 while (interrupts) { in msm_mdss_irq()
87 irq_hw_number_t hwirq = fls(interrupts) - 1; in msm_mdss_irq()
98 interrupts &= ~(1 << hwirq); in msm_mdss_irq()
/drivers/uio/
A DKconfig8 kernel interrupts and memory locations, allowing some drivers
32 interrupt handling code. Shared interrupts are not supported.
35 handles interrupts in a special way. Userspace is responsible
37 interrupts in the interrupt controller using the write() syscall.
46 interrupt handling code. Shared interrupts are not supported.
/drivers/pnp/pnpacpi/
A Drsparser.c316 if (p->interrupts[i]) in pnpacpi_parse_irq_option()
317 __set_bit(p->interrupts[i], map.bits); in pnpacpi_parse_irq_option()
333 if (p->interrupts[i]) { in pnpacpi_parse_ext_irq_option()
334 if (p->interrupts[i] < PNP_IRQ_NR) in pnpacpi_parse_ext_irq_option()
335 __set_bit(p->interrupts[i], map.bits); in pnpacpi_parse_ext_irq_option()
339 p->interrupts[i], PNP_IRQ_NR); in pnpacpi_parse_ext_irq_option()
678 irq->interrupts[0] = p->start; in pnpacpi_encode_irq()
708 extended_irq->interrupts[0] = p->start; in pnpacpi_encode_ext_irq()
/drivers/bcma/
A Ddriver_mips.c158 char interrupts[25]; in bcma_core_mips_print_irq() local
159 char *ints = interrupts; in bcma_core_mips_print_irq()
165 bcma_debug(dev->bus, "core 0x%04x, irq:%s\n", dev->id.id, interrupts); in bcma_core_mips_print_irq()
/drivers/staging/axis-fifo/
A Daxis-fifo.txt20 - interrupts: Should contain interrupts lines.
62 interrupts = <0 29 4>;
/drivers/tty/serial/8250/
A D8250_bcm7271.c559 u32 interrupts; in brcmuart_isr() local
563 interrupts = udma_readl(priv, REGS_DMA_ISR, UDMA_INTR_STATUS); in brcmuart_isr()
564 if (interrupts == 0) in brcmuart_isr()
570 udma_writel(priv, REGS_DMA_ISR, UDMA_INTR_CLEAR, interrupts); in brcmuart_isr()
572 rval = UDMA_IS_RX_INTERRUPT(interrupts); in brcmuart_isr()
575 tval = UDMA_IS_TX_INTERRUPT(interrupts); in brcmuart_isr()
579 dev_warn(dev, "Spurious interrupt: 0x%x\n", interrupts); in brcmuart_isr()
/drivers/net/phy/
A Dlxt.c83 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in lxt970_config_intr()
147 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in lxt971_config_intr()
/drivers/irqchip/
A DKconfig141 (MIP) needed by brcmstb PCIe to handle MSI-X interrupts on
217 maps the internal interrupts sources to PCIe interrupt.
291 to 8 external interrupts with configurable sense select.
376 a free irq and configures the IP. Thus the peripheral interrupts are
405 Support for interrupts in the Timer/Counter Unit (TCU) of the Ingenic
458 tristate "STM32MP extended interrupts and event controller"
464 Support STM32MP EXTI (extended interrupts and event) controller.
610 The PRUSS INTC enables various interrupts to be routed to multiple

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