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Searched refs:intrl (Results 1 – 9 of 9) sorted by relevance

/drivers/net/ethernet/intel/i40e/
A Di40e_txrx.h38 #define INTRL_REG_TO_USEC(intrl) ((intrl & ~INTRL_ENA) << 2) argument
47 static inline u16 i40e_intrl_usec_to_reg(int intrl) in i40e_intrl_usec_to_reg() argument
49 if (intrl >> 2) in i40e_intrl_usec_to_reg()
50 return ((intrl >> 2) | INTRL_ENA); in i40e_intrl_usec_to_reg()
A Di40e_ethtool.c2983 u16 intrl; in i40e_set_itr_per_queue() local
2985 intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit); in i40e_set_itr_per_queue()
3011 wr32(hw, I40E_PFINT_RATEN(q_vector->reg_idx), intrl); in i40e_set_itr_per_queue()
/drivers/net/ethernet/intel/iavf/
A Diavf_txrx.h38 #define INTRL_REG_TO_USEC(intrl) ((intrl & ~INTRL_ENA) << 2) argument
/drivers/net/ethernet/intel/ice/
A Dice_lib.c1809 static u32 ice_intrl_usec_to_reg(u8 intrl, u8 gran) in ice_intrl_usec_to_reg() argument
1811 u32 val = intrl / gran; in ice_intrl_usec_to_reg()
1823 void ice_write_intrl(struct ice_q_vector *q_vector, u8 intrl) in ice_write_intrl() argument
1828 ice_intrl_usec_to_reg(intrl, ICE_INTRL_GRAN_ABOVE_25)); in ice_write_intrl()
1901 ice_write_intrl(q_vector, q_vector->intrl); in ice_set_q_vector_intrl()
2906 coalesce[i].intrl = q_vector->intrl; in ice_vsi_rebuild_get_coalesce()
2979 vsi->q_vectors[i]->intrl = coalesce[i].intrl; in ice_vsi_rebuild_set_coalesce()
2997 vsi->q_vectors[i]->intrl = coalesce[0].intrl; in ice_vsi_rebuild_set_coalesce()
A Dice_lib.h95 void ice_write_intrl(struct ice_q_vector *q_vector, u8 intrl);
A Dice_txrx.h469 u8 intrl; member
A Dice.h470 u8 intrl; member
A Dice_ethtool.c4034 ec->rx_coalesce_usecs_high = rc->rx_ring->q_vector->intrl; in ice_get_rc_coalesce()
4160 if (ec->rx_coalesce_usecs_high != q_vector->intrl && in ice_set_rc_coalesce()
4166 if (ec->rx_coalesce_usecs_high != q_vector->intrl) in ice_set_rc_coalesce()
4167 q_vector->intrl = ec->rx_coalesce_usecs_high; in ice_set_rc_coalesce()
A Dice_base.c1045 ice_write_intrl(q_vector, q_vector->intrl); in ice_cfg_itr()

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