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Searched refs:io_regs (Results 1 – 23 of 23) sorted by relevance

/drivers/crypto/ccp/
A Dpsp-dev.c55 cmdresp_reg = psp->io_regs + psp->vdata->cmdresp_reg; in psp_mailbox_command()
56 cmdbuff_lo_reg = psp->io_regs + psp->vdata->cmdbuff_addr_lo_reg; in psp_mailbox_command()
57 cmdbuff_hi_reg = psp->io_regs + psp->vdata->cmdbuff_addr_hi_reg; in psp_mailbox_command()
129 status = ioread32(psp->io_regs + psp->vdata->intsts_reg); in psp_irq_handler()
132 iowrite32(status, psp->io_regs + psp->vdata->intsts_reg); in psp_irq_handler()
145 unsigned int val = ioread32(psp->io_regs + psp->vdata->feature_reg); in psp_get_capability()
243 psp->io_regs = sp->io_map; in psp_dev_init()
251 iowrite32(0, psp->io_regs + psp->vdata->inten_reg); in psp_dev_init()
252 iowrite32(-1, psp->io_regs + psp->vdata->intsts_reg); in psp_dev_init()
270 iowrite32(-1, psp->io_regs + psp->vdata->inten_reg); in psp_dev_init()
A Dccp-dev-v3.c101 cr_addr = ccp->io_regs + CMD_REQ0 + CMD_REQ_INCR; in ccp_do_cmd()
111 iowrite32(cr0, ccp->io_regs + CMD_REQ0); in ccp_do_cmd()
127 iowrite32(cmd, ccp->io_regs + DEL_CMD_Q_JOB); in ccp_do_cmd()
137 iowrite32(cmd, ccp->io_regs + DEL_CMD_Q_JOB); in ccp_do_cmd()
316 iowrite32(0x00, ccp->io_regs + IRQ_MASK_REG); in ccp_disable_queue_interrupts()
321 iowrite32(ccp->qim, ccp->io_regs + IRQ_MASK_REG); in ccp_enable_queue_interrupts()
331 status = ioread32(ccp->io_regs + IRQ_STATUS_REG); in ccp_irq_bh()
349 iowrite32(q_int, ccp->io_regs + IRQ_STATUS_REG); in ccp_irq_bh()
380 qmr = ioread32(ccp->io_regs + Q_MASK_REG); in ccp_init()
449 iowrite32(ccp->qim, ccp->io_regs + IRQ_STATUS_REG); in ccp_init()
[all …]
A Dplatform-access.c75 cmd = psp->io_regs + pa_dev->vdata->cmdresp_reg; in psp_send_platform_access_msg()
76 lo = psp->io_regs + pa_dev->vdata->cmdbuff_addr_lo_reg; in psp_send_platform_access_msg()
77 hi = psp->io_regs + pa_dev->vdata->cmdbuff_addr_hi_reg; in psp_send_platform_access_msg()
159 button = psp->io_regs + pa_dev->vdata->doorbell_button_reg; in psp_ring_platform_doorbell()
160 cmd = psp->io_regs + pa_dev->vdata->doorbell_cmd_reg; in psp_ring_platform_doorbell()
A Dccp-dev-v5.c791 qmr = ioread32(ccp->io_regs + Q_MASK_REG); in ccp5_init()
844 cmd_q->reg_control = ccp->io_regs + in ccp5_init()
904 iowrite32(status_lo, ccp->io_regs + LSB_PUBLIC_MASK_LO_OFFSET); in ccp5_init()
1068 iowrite32(0x0, ccp->io_regs + CMD5_REQID_CONFIG_OFFSET); in ccp5_config()
1078 iowrite32(0x00012D57, ccp->io_regs + CMD5_TRNG_CTL_OFFSET); in ccp5other_config()
1079 iowrite32(0x00000003, ccp->io_regs + CMD5_CONFIG_0_OFFSET); in ccp5other_config()
1081 rnd = ioread32(ccp->io_regs + TRNG_OUT_REG); in ccp5other_config()
1082 iowrite32(rnd, ccp->io_regs + CMD5_AES_MASK_OFFSET); in ccp5other_config()
1085 iowrite32(0x0000001F, ccp->io_regs + CMD5_QUEUE_MASK_OFFSET); in ccp5other_config()
1086 iowrite32(0x00005B6D, ccp->io_regs + CMD5_QUEUE_PRIO_OFFSET); in ccp5other_config()
[all …]
A Dtee-dev.c178 tee->io_regs = psp->io_regs; in tee_dev_init()
232 rptr = ioread32(tee->io_regs + tee->vdata->ring_rptr_reg); in tee_submit_cmd()
283 iowrite32(tee->rb_mgr.wptr, tee->io_regs + tee->vdata->ring_wptr_reg); in tee_submit_cmd()
A Dsev-dev.c145 reg = ioread32(sev->io_regs + sev->vdata->cmdresp_reg); in sev_irq_handler()
167 *reg = ioread32(sev->io_regs + sev->vdata->cmdresp_reg); in sev_wait_cmd_ioc()
181 *reg = ioread32(sev->io_regs + sev->vdata->cmdresp_reg); in sev_wait_cmd_ioc()
918 iowrite32(phys_lsb, sev->io_regs + sev->vdata->cmdbuff_addr_lo_reg); in __sev_do_cmd_locked()
919 iowrite32(phys_msb, sev->io_regs + sev->vdata->cmdbuff_addr_hi_reg); in __sev_do_cmd_locked()
935 iowrite32(reg, sev->io_regs + sev->vdata->cmdresp_reg); in __sev_do_cmd_locked()
963 cmdbuff_hi = ioread32(sev->io_regs + sev->vdata->cmdbuff_addr_hi_reg); in __sev_do_cmd_locked()
964 cmdbuff_lo = ioread32(sev->io_regs + sev->vdata->cmdbuff_addr_lo_reg); in __sev_do_cmd_locked()
2396 sev->io_regs = psp->io_regs; in sev_dev_init()
A Dsp-pci.c49 unsigned int val = ioread32(psp->io_regs + _offset); \
80 val = ioread32(psp->io_regs + psp->vdata->bootloader_info_reg); in psp_firmware_is_visible()
84 val = ioread32(psp->io_regs + psp->vdata->tee->info_reg); in psp_firmware_is_visible()
A Dsev-dev.h41 void __iomem *io_regs; member
A Dtee-dev.h56 void __iomem *io_regs; member
A Dpsp-dev.h61 void __iomem *io_regs; member
A Dccp-dev.c515 trng_value = ioread32(ccp->io_regs + TRNG_OUT_REG); in ccp_trng_read()
633 ccp->io_regs = sp->io_map + ccp->vdata->offset; in ccp_dev_init()
A Dccp-debugfs.c63 regval = ioread32(ccp->io_regs + CMD5_PSP_CCP_VERSION); in ccp5_debugfs_info_read()
A Dccp-dev.h365 void __iomem *io_regs; member
/drivers/dma/amd/ptdma/
A Dptdma-dev.c195 iowrite32(CMD_CONFIG_VHB_EN, pt->io_regs + CMD_CONFIG_OFFSET); in pt_core_init()
196 iowrite32(CMD_QUEUE_PRIO, pt->io_regs + CMD_QUEUE_PRIO_OFFSET); in pt_core_init()
197 iowrite32(CMD_TIMEOUT_DISABLE, pt->io_regs + CMD_TIMEOUT_OFFSET); in pt_core_init()
198 iowrite32(CMD_CLK_GATE_CONFIG, pt->io_regs + CMD_CLK_GATE_CTL_OFFSET); in pt_core_init()
199 iowrite32(CMD_CONFIG_REQID, pt->io_regs + CMD_REQID_CONFIG_OFFSET); in pt_core_init()
219 cmd_q->reg_control = pt->io_regs + CMD_Q_STATUS_INCR; in pt_core_init()
A Dptdma-pci.c166 pt->io_regs = iomap_table[pt->dev_vdata->bar]; in pt_pci_probe()
167 if (!pt->io_regs) { in pt_pci_probe()
A Dptdma-debugfs.c41 regval = ioread32(pt->io_regs + CMD_PT_VERSION); in pt_debugfs_info_show()
A Dptdma.h242 void __iomem *io_regs; member
/drivers/mtd/nand/raw/
A Dpl35x-nand-controller.c139 void __iomem *io_regs; member
351 buf32[i] = readl(nfc->io_regs + data_phase_addr); in pl35x_nand_read_data_op()
383 writel(buf32[i], nfc->io_regs + data_phase_addr); in pl35x_nand_write_data_op()
534 writel(addr1, nfc->io_regs + cmd_addr); in pl35x_nand_write_page_hwecc()
536 writel(addr2, nfc->io_regs + cmd_addr); in pl35x_nand_write_page_hwecc()
626 writel(addr1, nfc->io_regs + cmd_addr); in pl35x_nand_read_page_hwecc()
628 writel(addr2, nfc->io_regs + cmd_addr); in pl35x_nand_read_page_hwecc()
722 writel(addr1, nfc->io_regs + cmd_addr); in pl35x_nand_exec_op()
724 writel(addr2, nfc->io_regs + cmd_addr); in pl35x_nand_exec_op()
1156 if (IS_ERR(nfc->io_regs)) in pl35x_nand_probe()
[all …]
/drivers/platform/mellanox/
A Dmlxreg-dpu.c331 struct platform_device *io_regs; member
480 mlxreg_dpu->io_regs = in mlxreg_dpu_config_init()
485 if (IS_ERR(mlxreg_dpu->io_regs)) { in mlxreg_dpu_config_init()
489 return PTR_ERR(mlxreg_dpu->io_regs); in mlxreg_dpu_config_init()
511 platform_device_unregister(mlxreg_dpu->io_regs); in mlxreg_dpu_config_init()
519 platform_device_unregister(mlxreg_dpu->io_regs); in mlxreg_dpu_config_exit()
A Dmlxreg-lc.c83 struct platform_device *io_regs; member
757 mlxreg_lc->io_regs = in mlxreg_lc_config_init()
760 if (IS_ERR(mlxreg_lc->io_regs)) { in mlxreg_lc_config_init()
764 err = PTR_ERR(mlxreg_lc->io_regs); in mlxreg_lc_config_init()
788 if (mlxreg_lc->io_regs) in mlxreg_lc_config_init()
789 platform_device_unregister(mlxreg_lc->io_regs); in mlxreg_lc_config_init()
803 if (mlxreg_lc->io_regs) in mlxreg_lc_config_exit()
804 platform_device_unregister(mlxreg_lc->io_regs); in mlxreg_lc_config_exit()
A Dnvsw-sn2201.c150 struct platform_device *io_regs; member
1082 nvsw_sn2201->io_regs = in nvsw_sn2201_config_init()
1086 if (IS_ERR(nvsw_sn2201->io_regs)) { in nvsw_sn2201_config_init()
1087 err = PTR_ERR(nvsw_sn2201->io_regs); in nvsw_sn2201_config_init()
1142 if (nvsw_sn2201->io_regs) in nvsw_sn2201_config_init()
1143 platform_device_unregister(nvsw_sn2201->io_regs); in nvsw_sn2201_config_init()
1161 if (nvsw_sn2201->io_regs) in nvsw_sn2201_config_exit()
1162 platform_device_unregister(nvsw_sn2201->io_regs); in nvsw_sn2201_config_exit()
/drivers/dma/amd/ae4dma/
A Dae4dma-dev.c97 writel(max_hw_q, pt->io_regs); in ae4_core_init()
107 cmd_q->reg_control = pt->io_regs + ((i + 1) * AE4_Q_SZ); in ae4_core_init()
127 cmd_q->reg_control = pt->io_regs + ((i + 1) * AE4_Q_SZ); in ae4_core_init()
A Dae4dma-pci.c103 pt->io_regs = pcim_iomap_table(pdev)[0]; in ae4_pci_probe()
104 if (!pt->io_regs) { in ae4_pci_probe()

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