| /drivers/gpu/drm/amd/display/dc/resource/dce100/ |
| A D | dce100_resource.c | 142 #define ipp_regs(id)\ macro
147 static const struct dce_ipp_registers ipp_regs[] = { variable
148 ipp_regs(0),
149 ipp_regs(1),
150 ipp_regs(2),
151 ipp_regs(3),
152 ipp_regs(4),
153 ipp_regs(5)
607 &ipp_regs[inst], &ipp_shift, &ipp_mask); in dce100_ipp_create()
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| /drivers/gpu/drm/amd/display/dc/resource/dce120/ |
| A D | dce120_resource.c | 184 #define ipp_regs(id)\ macro
189 static const struct dce_ipp_registers ipp_regs[] = { variable
190 ipp_regs(0),
191 ipp_regs(1),
192 ipp_regs(2),
193 ipp_regs(3),
194 ipp_regs(4),
195 ipp_regs(5)
760 &ipp_regs[inst], &ipp_shift, &ipp_mask); in dce120_ipp_create()
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| /drivers/gpu/drm/amd/display/dc/resource/dce112/ |
| A D | dce112_resource.c | 184 #define ipp_regs(id)\ macro
189 static const struct dce_ipp_registers ipp_regs[] = { variable
190 ipp_regs(0),
191 ipp_regs(1),
192 ipp_regs(2),
193 ipp_regs(3),
194 ipp_regs(4),
195 ipp_regs(5)
675 &ipp_regs[inst], &ipp_shift, &ipp_mask); in dce112_ipp_create()
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| /drivers/gpu/drm/amd/display/dc/resource/dce60/ |
| A D | dce60_resource.c | 159 #define ipp_regs(id)\ macro
164 static const struct dce_ipp_registers ipp_regs[] = { variable
165 ipp_regs(0),
166 ipp_regs(1),
167 ipp_regs(2),
168 ipp_regs(3),
169 ipp_regs(4),
170 ipp_regs(5)
793 &ipp_regs[inst], &ipp_shift, &ipp_mask); in dce60_ipp_create()
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| /drivers/gpu/drm/amd/display/dc/resource/dce80/ |
| A D | dce80_resource.c | 158 #define ipp_regs(id)\ macro
163 static const struct dce_ipp_registers ipp_regs[] = { variable
164 ipp_regs(0),
165 ipp_regs(1),
166 ipp_regs(2),
167 ipp_regs(3),
168 ipp_regs(4),
169 ipp_regs(5)
799 &ipp_regs[inst], &ipp_shift, &ipp_mask); in dce80_ipp_create()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn201/ |
| A D | dcn201_resource.c | 414 #define ipp_regs(id)\ macro
419 static const struct dcn10_ipp_registers ipp_regs[] = { variable
420 ipp_regs(0),
421 ipp_regs(1),
422 ipp_regs(2),
423 ipp_regs(3),
656 &ipp_regs[inst], &ipp_shift, &ipp_mask); in dcn201_ipp_create()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn10/ |
| A D | dcn10_resource.c | 293 #define ipp_regs(id)\ macro
298 static const struct dcn10_ipp_registers ipp_regs[] = { variable
299 ipp_regs(0),
300 ipp_regs(1),
301 ipp_regs(2),
302 ipp_regs(3),
596 &ipp_regs[inst], &ipp_shift, &ipp_mask); in dcn10_ipp_create()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn21/ |
| A D | dcn21_resource.c | 387 #define ipp_regs(id)\ macro
392 static const struct dcn10_ipp_registers ipp_regs[] = { variable
393 ipp_regs(0),
394 ipp_regs(1),
395 ipp_regs(2),
396 ipp_regs(3),
495 &ipp_regs[inst], &ipp_shift, &ipp_mask); in dcn21_ipp_create()
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| /drivers/gpu/drm/amd/display/dc/resource/dce110/ |
| A D | dce110_resource.c | 175 #define ipp_regs(id)\ macro
180 static const struct dce_ipp_registers ipp_regs[] = { variable
181 ipp_regs(0),
182 ipp_regs(1),
183 ipp_regs(2)
652 &ipp_regs[inst], &ipp_shift, &ipp_mask); in dce110_ipp_create()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| A D | dcn20_resource.c | 352 #define ipp_regs(id)\ macro
357 static const struct dcn10_ipp_registers ipp_regs[] = { variable
358 ipp_regs(0),
359 ipp_regs(1),
360 ipp_regs(2),
361 ipp_regs(3),
362 ipp_regs(4),
363 ipp_regs(5),
762 &ipp_regs[inst], &ipp_shift, &ipp_mask); in dcn20_ipp_create()
|