| /drivers/gpu/drm/xe/ |
| A D | xe_hw_engine.c | 52 unsigned int irq_offset : 8; member
62 .irq_offset = ilog2(INTR_RCS0),
70 .irq_offset = ilog2(INTR_BCS(0)),
78 .irq_offset = ilog2(INTR_BCS(1)),
86 .irq_offset = ilog2(INTR_BCS(2)),
94 .irq_offset = ilog2(INTR_BCS(3)),
102 .irq_offset = ilog2(INTR_BCS(4)),
110 .irq_offset = ilog2(INTR_BCS(5)),
118 .irq_offset = ilog2(INTR_BCS(6)),
134 .irq_offset = ilog2(INTR_BCS8),
[all …]
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| A D | xe_hw_engine_types.h | 120 u16 irq_offset; member
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| A D | xe_memirq.c | 450 u16 offset = hwe->irq_offset; in xe_memirq_hwe_handler()
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| /drivers/gpio/ |
| A D | gpio-xilinx.c | 376 int irq_offset = irqd_to_hwirq(irq_data); in xgpio_irq_mask() local
377 unsigned long bit = find_nth_bit(chip->map, 64, irq_offset), enable; in xgpio_irq_mask()
393 gpiochip_disable_irq(&chip->gc, irq_offset); in xgpio_irq_mask()
404 int irq_offset = irqd_to_hwirq(irq_data); in xgpio_irq_unmask() local
405 unsigned long bit = find_nth_bit(chip->map, 64, irq_offset), enable; in xgpio_irq_unmask()
408 gpiochip_enable_irq(&chip->gc, irq_offset); in xgpio_irq_unmask()
444 int irq_offset = irqd_to_hwirq(irq_data); in xgpio_set_irq_type() local
445 unsigned long bit = find_nth_bit(chip->map, 64, irq_offset); in xgpio_set_irq_type()
487 int irq_offset; in xgpio_irqhandler() local
517 for_each_set_bit(irq_offset, sw, 64) in xgpio_irqhandler()
[all …]
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| /drivers/misc/ocxl/ |
| A D | file.c | 205 u64 irq_offset; in afu_ioctl() local
228 irq_offset = ocxl_irq_id_to_offset(ctx, irq_id); in afu_ioctl()
229 rc = copy_to_user((u64 __user *) args, &irq_offset, in afu_ioctl()
230 sizeof(irq_offset)); in afu_ioctl()
239 rc = copy_from_user(&irq_offset, (u64 __user *) args, in afu_ioctl()
240 sizeof(irq_offset)); in afu_ioctl()
243 irq_id = ocxl_irq_offset_to_id(ctx, irq_offset); in afu_ioctl()
254 irq_id = ocxl_irq_offset_to_id(ctx, irq_fd.irq_offset); in afu_ioctl()
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| /drivers/crypto/marvell/octeontx2/ |
| A D | otx2_cptlf.c | 313 int lf_num, int irq_offset, in cptlf_do_register_interrrupts() argument
319 irq_offset); in cptlf_do_register_interrrupts()
321 lfs->lf[lf_num].irq_name[irq_offset], in cptlf_do_register_interrrupts()
326 lfs->lf[lf_num].is_irq_reg[irq_offset] = true; in cptlf_do_register_interrrupts()
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| /drivers/dma/xilinx/ |
| A D | zynqmp_dma.c | 25 #define ZYNQMP_DMA_ISR (chan->irq_offset + 0x100)
26 #define ZYNQMP_DMA_IMR (chan->irq_offset + 0x104)
27 #define ZYNQMP_DMA_IER (chan->irq_offset + 0x108)
28 #define ZYNQMP_DMA_IDS (chan->irq_offset + 0x10c)
242 u32 irq_offset; member
938 chan->irq_offset = match_data->offset; in zynqmp_dma_chan_probe()
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| /drivers/net/ethernet/marvell/octeontx2/af/ |
| A D | lmac_common.h | 72 u8 irq_offset; member
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| A D | rpm.c | 17 .irq_offset = 1,
52 .irq_offset = 1,
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| A D | cgx.c | 1666 cnt * mac_ops->irq_offset); in cgx_configure_interrupt()
1904 .irq_offset = 9,
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| /drivers/dma/ |
| A D | sun6i-dma.c | 440 u32 irq_val, irq_reg, irq_offset; in sun6i_dma_start_desc() local
459 irq_offset = pchan->idx % DMA_IRQ_CHAN_NR; in sun6i_dma_start_desc()
465 (irq_offset * DMA_IRQ_CHAN_WIDTH)); in sun6i_dma_start_desc()
466 irq_val |= vchan->irq_type << (irq_offset * DMA_IRQ_CHAN_WIDTH); in sun6i_dma_start_desc()
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| /drivers/pci/controller/dwc/ |
| A D | pci-keystone.c | 654 u32 irq_offset = irq - ks_pcie->intx_host_irqs[0]; in ks_pcie_intx_irq_handler() local
665 ks_pcie_handle_intx_irq(ks_pcie, irq_offset); in ks_pcie_intx_irq_handler()
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| /drivers/scsi/qla2xxx/ |
| A D | qla_nvme.c | 843 blk_mq_map_hw_queues(map, &vha->hw->pdev->dev, vha->irq_offset); in qla_nvme_map_queues()
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| A D | qla_mid.c | 509 vha->irq_offset = QLA_BASE_VECTORS; in qla24xx_create_vhost()
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| A D | qla_def.h | 5119 unsigned int irq_offset; member
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| A D | qla_isr.c | 4569 vha->irq_offset = desc.pre_vectors; in qla24xx_enable_msix()
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| A D | qla_os.c | 8062 vha->irq_offset); in qla2xxx_map_queues()
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