Home
last modified time | relevance | path

Searched refs:irq_pipe_mask (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/i915/display/
A Dintel_display_power_map.c752 .irq_pipe_mask = BIT(PIPE_B),
789 .irq_pipe_mask = BIT(PIPE_C),
918 .irq_pipe_mask = BIT(PIPE_B),
940 .irq_pipe_mask = BIT(PIPE_C),
948 .irq_pipe_mask = BIT(PIPE_D),
1073 .irq_pipe_mask = BIT(PIPE_B),
1083 .irq_pipe_mask = BIT(PIPE_C),
1168 .irq_pipe_mask = BIT(PIPE_B),
1178 .irq_pipe_mask = BIT(PIPE_C),
1186 .irq_pipe_mask = BIT(PIPE_D),
[all …]
A Dintel_display_power_well.c202 u8 irq_pipe_mask, bool has_vga) in hsw_power_well_post_enable() argument
207 if (irq_pipe_mask) in hsw_power_well_post_enable()
208 gen8_irq_power_well_post_enable(display, irq_pipe_mask); in hsw_power_well_post_enable()
212 u8 irq_pipe_mask) in hsw_power_well_pre_disable() argument
214 if (irq_pipe_mask) in hsw_power_well_pre_disable()
215 gen8_irq_power_well_pre_disable(display, irq_pipe_mask); in hsw_power_well_pre_disable()
401 power_well->desc->irq_pipe_mask, in hsw_power_well_enable()
412 power_well->desc->irq_pipe_mask); in hsw_power_well_disable()
A Dintel_display_power_well.h98 u16 irq_pipe_mask:4; member

Completed in 23 milliseconds