Searched refs:is_cxl_root (Results 1 – 6 of 6) sorted by relevance
546 if (is_cxl_root(port)) in cxl_port_release()968 if (is_cxl_root(port)) in cxl_port_to_pci_bus()1010 if (is_cxl_root(port)) in dev_is_cxl_root_child()1079 if (is_cxl_root(port)) in cond_cxl_root_lock()1085 if (is_cxl_root(port)) in cond_cxl_root_unlock()1118 if (is_cxl_root(port)) in __devm_cxl_add_dport()1384 if (is_cxl_root(port)) in endpoint_host()1804 if (!is_cxl_root(port)) in cxl_root_decoder_alloc()2181 bool is_cxl_root; in cxl_endpoint_get_perf_coordinates() local2208 if (!is_cxl_root) { in cxl_endpoint_get_perf_coordinates()[all …]
257 while (!is_cxl_root(to_cxl_port(iter->dev.parent))) in cxl_region_decode_reset()311 for (iter = cxled_to_port(cxled); !is_cxl_root(iter); in cxl_region_decode_commit()1365 } while (!is_cxl_root(iter)); in cxl_port_setup_targets()1379 if (is_cxl_root(parent_port)) { in cxl_port_setup_targets()1573 while (!is_cxl_root(to_cxl_port(iter->dev.parent))) in cxl_region_teardown_targets()1606 while (!is_cxl_root(to_cxl_port(iter->dev.parent))) in cxl_region_setup_targets()1699 for (iter = cxled_to_port(cxled); !is_cxl_root(iter); in cxl_region_attach_position()1709 for (iter = cxled_to_port(cxled); !is_cxl_root(iter); in cxl_region_attach_position()1875 if (is_cxl_root(iter)) in cxl_calc_interleave_pos()2132 for (struct cxl_port *iter = cxled_to_port(cxled); !is_cxl_root(iter); in __cxl_decoder_detach()
661 *gp_is_root = is_cxl_root(gp_port); in cxl_endpoint_gather_bandwidth()784 if (is_cxl_root(gp_port)) { in DEFINE_FREE()
453 while (!is_cxl_root(root) && is_cxl_port(root->dev.parent)) in cxl_hdm_decode_init()455 if (!is_cxl_root(root)) { in cxl_hdm_decode_init()
59 for (iter = parent_port, down = NULL; !is_cxl_root(iter); in devm_cxl_add_endpoint()
722 static inline bool is_cxl_root(struct cxl_port *port) in is_cxl_root() function
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