| /drivers/gpu/drm/msm/disp/dpu1/ |
| A D | dpu_formats.c | 165 layout->total_size += layout->plane_size[i]; in _dpu_format_populate_plane_sizes_ubwc() 206 layout->plane_size[0] = layout->plane_pitch[0] * fb->height; in _dpu_format_populate_plane_sizes_linear() 207 layout->plane_size[1] = layout->plane_pitch[1] * in _dpu_format_populate_plane_sizes_linear() 217 layout->plane_size[2] = layout->plane_size[1]; in _dpu_format_populate_plane_sizes_linear() 218 layout->plane_pitch[2] = layout->plane_pitch[1]; in _dpu_format_populate_plane_sizes_linear() 239 layout->total_size += layout->plane_size[i]; in _dpu_format_populate_plane_sizes_linear() 312 layout->plane_addr[0] = base_addr + layout->plane_size[2]; in _dpu_format_populate_addrs_ubwc() 315 layout->plane_addr[1] = base_addr + layout->plane_size[0] in _dpu_format_populate_addrs_ubwc() 316 + layout->plane_size[2] + layout->plane_size[3]; in _dpu_format_populate_addrs_ubwc() 325 layout->plane_addr[3] = base_addr + layout->plane_size[0] in _dpu_format_populate_addrs_ubwc() [all …]
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| /drivers/md/dm-vdo/indexer/ |
| A D | index-layout.c | 307 return open_layout_reader(layout, region, -layout->super.start_offset, in open_region_reader() 322 return open_layout_writer(layout, region, -layout->super.start_offset, in open_region_writer() 620 result = invalidate_old_save(layout, &layout->index.saves[i]); in discard_index_state_data() 660 *lr++ = layout->seal; in make_layout_region_table() 731 result = open_layout_writer(layout, &layout->config, offset, &writer); in write_uds_index_config() 761 result = open_layout_writer(layout, &layout->header, offset, &writer); in save_layout() 1031 instantiate_index_save_layout(isl, &layout->super, layout->index.nonce, in setup_uds_index_save_slot() 1601 offset = layout->super.volume_offset - layout->super.start_offset; in verify_uds_index_config() 1602 result = open_layout_reader(layout, &layout->config, offset, &reader); in verify_uds_index_config() 1708 if (layout == NULL) in uds_free_index_layout() [all …]
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| A D | index-layout.h | 24 void uds_free_index_layout(struct index_layout *layout); 26 int __must_check uds_replace_index_layout_storage(struct index_layout *layout, 29 int __must_check uds_load_index_state(struct index_layout *layout, 32 int __must_check uds_save_index_state(struct index_layout *layout, 35 int __must_check uds_discard_open_chapter(struct index_layout *layout); 37 u64 __must_check uds_get_volume_nonce(struct index_layout *layout); 39 int __must_check uds_open_volume_bufio(struct index_layout *layout, size_t block_size,
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| /drivers/clk/at91/ |
| A D | clk-programmable.c | 18 #define PROG_PRES(layout, pckr) ((pckr >> layout->pres_shift) & layout->pres_mask) argument 36 const struct clk_programmable_layout *layout = prog->layout; in clk_programmable_recalc_rate() local 42 if (layout->is_pres_direct) in clk_programmable_recalc_rate() 54 const struct clk_programmable_layout *layout = prog->layout; in clk_programmable_determine_rate() local 68 if (layout->is_pres_direct) { in clk_programmable_determine_rate() 106 const struct clk_programmable_layout *layout = prog->layout; in clk_programmable_set_parent() local 110 if (layout->have_slck_mck) in clk_programmable_set_parent() 131 const struct clk_programmable_layout *layout = prog->layout; in clk_programmable_get_parent() local 152 const struct clk_programmable_layout *layout = prog->layout; in clk_programmable_set_rate() local 175 layout->pres_mask << layout->pres_shift, in clk_programmable_set_rate() [all …]
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| A D | clk-generated.c | 29 const struct clk_pcr_layout *layout; member 44 regmap_write(gck->regmap, gck->layout->offset, in clk_generated_set() 45 (gck->id & gck->layout->pid_mask)); in clk_generated_set() 48 gck->layout->cmd | enable, in clk_generated_set() 50 gck->layout->cmd | in clk_generated_set() 77 (gck->id & gck->layout->pid_mask)); in clk_generated_disable() 79 gck->layout->cmd | AT91_PMC_PCR_GCKEN, in clk_generated_disable() 80 gck->layout->cmd); in clk_generated_disable() 92 (gck->id & gck->layout->pid_mask)); in clk_generated_is_enabled() 310 (gck->id & gck->layout->pid_mask)); in clk_generated_startup() [all …]
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| A D | clk-pll.c | 20 #define PLL_MUL(reg, layout) (((reg) >> (layout)->mul_shift) & \ argument 21 (layout)->mul_mask) 23 #define PLL_MUL_MASK(layout) ((layout)->mul_mask) argument 24 #define PLL_MUL_MAX(layout) (PLL_MUL_MASK(layout) + 1) argument 41 const struct clk_pll_layout *layout; member 59 const struct clk_pll_layout *layout = pll->layout; in clk_pll_prepare() local 73 mul = PLL_MUL(pllr, layout); in clk_pll_prepare() 90 ((pll->mul & layout->mul_mask) << layout->mul_shift)); in clk_pll_prepare() 128 const struct clk_pll_layout *layout = pll->layout; in clk_pll_get_best_div_mul() local 339 pll->layout = layout; in at91_clk_register_pll() [all …]
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| A D | clk-sam9x60-pll.c | 81 if (core->layout->div2) in sam9x60_frac_pll_recalc_rate() 99 cmul = (val & core->layout->mul_mask) >> core->layout->mul_shift; in sam9x60_frac_pll_set() 100 cfrac = (val & core->layout->frac_mask) >> core->layout->frac_shift; in sam9x60_frac_pll_set() 268 cmul = (val & core->layout->mul_mask) >> core->layout->mul_shift; in sam9x60_frac_pll_set_rate_chg() 269 cfrac = (val & core->layout->frac_mask) >> core->layout->frac_shift; in sam9x60_frac_pll_set_rate_chg() 372 cdiv = (val & core->layout->div_mask) >> core->layout->div_shift; in sam9x60_div_pll_set() 524 cdiv = (val & core->layout->div_mask) >> core->layout->div_shift; in sam9x60_div_pll_set_rate_chg() 580 cdiv = (val & core.layout->div_mask) >> core.layout->div_shift; in sam9x60_div_pll_notifier_fn() 668 frac->core.layout = layout; in sam9x60_clk_register_frac_pll() 751 if (layout->div2) in sam9x60_clk_register_div_pll() [all …]
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| A D | clk-peripheral.c | 39 const struct clk_pcr_layout *layout; member 174 (periph->id & periph->layout->pid_mask)); in clk_sam9x5_peripheral_set() 176 periph->layout->div_mask | periph->layout->cmd | in clk_sam9x5_peripheral_set() 179 periph->layout->cmd | enable); in clk_sam9x5_peripheral_set() 202 (periph->id & periph->layout->pid_mask)); in clk_sam9x5_peripheral_disable() 204 AT91_PMC_PCR_EN | periph->layout->cmd, in clk_sam9x5_peripheral_disable() 205 periph->layout->cmd); in clk_sam9x5_peripheral_disable() 220 (periph->id & periph->layout->pid_mask)); in clk_sam9x5_peripheral_is_enabled() 449 const struct clk_pcr_layout *layout, in at91_clk_register_sam9x5_peripheral() argument 487 if (layout->div_mask) in at91_clk_register_sam9x5_peripheral() [all …]
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| A D | clk-master.c | 90 const struct clk_master_layout *layout = master->layout; in clk_master_div_recalc_rate() local 99 mckr &= layout->mask; in clk_master_div_recalc_rate() 124 mckr &= master->layout->mask; in clk_master_div_save_context() 145 mckr &= master->layout->mask; in clk_master_div_restore_context() 192 mckr &= master->layout->mask; in clk_master_div_set() 390 val &= master->layout->mask; in clk_master_pres_recalc_rate() 410 mckr &= master->layout->mask; in clk_master_pres_get_parent() 426 val &= master->layout->mask; in clk_master_pres_save_context() 450 val &= master->layout->mask; in clk_master_pres_restore_context() 505 master->layout = layout; in at91_clk_register_master_internal() [all …]
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| /drivers/gpio/ |
| A D | gpio-creg-snps.c | 33 const struct creg_layout *layout = hcg->layout; in creg_gpio_set() local 38 value = val ? hcg->layout->on[offset] : hcg->layout->off[offset]; in creg_gpio_set() 42 reg_shift += layout->bit_per_gpio[i] + layout->shift[i]; in creg_gpio_set() 62 const struct creg_layout *layout = hcg->layout; in creg_gpio_validate_pg() local 64 if (layout->bit_per_gpio[i] < 1 || layout->bit_per_gpio[i] > 8) in creg_gpio_validate_pg() 68 if (GENMASK(31, layout->bit_per_gpio[i]) & layout->on[i]) in creg_gpio_validate_pg() 72 if (GENMASK(31, layout->bit_per_gpio[i]) & layout->off[i]) in creg_gpio_validate_pg() 75 if (layout->on[i] == layout->off[i]) in creg_gpio_validate_pg() 87 if (hcg->layout->ngpio < 1 || hcg->layout->ngpio > MAX_GPIO) in creg_gpio_validate() 99 reg_len += hcg->layout->shift[i] + hcg->layout->bit_per_gpio[i]; in creg_gpio_validate() [all …]
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| /drivers/net/can/spi/mcp251xfd/ |
| A D | mcp251xfd-ethtool.c | 22 struct can_ram_layout layout; in mcp251xfd_ring_get_ringparam() local 25 ring->rx_max_pending = layout.max_rx; in mcp251xfd_ring_get_ringparam() 26 ring->tx_max_pending = layout.max_tx; in mcp251xfd_ring_get_ringparam() 40 struct can_ram_layout layout; in mcp251xfd_ring_set_ringparam() local 48 priv->rx_obj_num = layout.cur_rx; in mcp251xfd_ring_set_ringparam() 50 priv->tx->obj_num = layout.cur_tx; in mcp251xfd_ring_set_ringparam() 97 struct can_ram_layout layout; in mcp251xfd_ring_set_coalesce() local 108 priv->rx_obj_num = layout.cur_rx; in mcp251xfd_ring_set_coalesce() 112 priv->tx->obj_num = layout.cur_tx; in mcp251xfd_ring_set_coalesce() 133 struct can_ram_layout layout; in mcp251xfd_ethtool_init() local [all …]
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| A D | mcp251xfd-ram.c | 80 layout->default_tx = num_tx; in can_ram_get_layout() 106 if (num_rx > layout->max_rx) in can_ram_get_layout() 107 num_rx = layout->default_rx; in can_ram_get_layout() 152 layout->cur_rx = num_rx; in can_ram_get_layout() 153 layout->cur_tx = num_tx; in can_ram_get_layout() 154 layout->rx_coalesce = num_rx_coalesce; in can_ram_get_layout() 155 layout->tx_coalesce = num_tx_coalesce; in can_ram_get_layout() 157 layout->cur_rx = layout->default_rx; in can_ram_get_layout() 158 layout->cur_tx = layout->default_tx; in can_ram_get_layout() 159 layout->rx_coalesce = 0; in can_ram_get_layout() [all …]
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| /drivers/nvmem/ |
| A D | layouts.c | 37 return drv->probe(layout); in nvmem_layout_bus_probe() 45 return drv->remove(layout); in nvmem_layout_bus_remove() 76 kfree(layout); in nvmem_layout_release_device() 82 struct nvmem_layout *layout; in nvmem_layout_create_device() local 86 layout = kzalloc(sizeof(*layout), GFP_KERNEL); in nvmem_layout_create_device() 87 if (!layout) in nvmem_layout_create_device() 91 layout->nvmem = nvmem; in nvmem_layout_create_device() 92 nvmem->layout = layout; in nvmem_layout_create_device() 95 dev = &layout->dev; in nvmem_layout_create_device() 187 if (!nvmem->layout) in nvmem_destroy_layout() [all …]
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| /drivers/md/dm-vdo/ |
| A D | encodings.c | 781 static int allocate_partition(struct layout *layout, u8 id, in allocate_partition() argument 816 block_count_t free_blocks = layout->last_free - layout->first_free; in make_partition() 830 offset = beginning ? layout->first_free : (layout->last_free - size); in make_partition() 840 layout->last_free = layout->last_free - size; in make_partition() 858 block_count_t summary_blocks, struct layout *layout) in vdo_initialize_layout() argument 868 *layout = (struct layout) { in vdo_initialize_layout() 910 void vdo_uninitialize_layout(struct layout *layout) in vdo_uninitialize_layout() argument 919 memset(layout, 0, sizeof(struct layout)); in vdo_uninitialize_layout() 930 int vdo_get_partition(struct layout *layout, enum partition_id id, in vdo_get_partition() argument 996 block_count_t size, struct layout *layout) in decode_layout() argument [all …]
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| /drivers/nvmem/layouts/ |
| A D | onie-tlv.c | 102 struct device_node *layout; in onie_tlv_add_cells() local 108 layout = of_nvmem_layout_get_container(nvmem); in onie_tlv_add_cells() 109 if (!layout) in onie_tlv_add_cells() 126 cell.np = of_get_child_by_name(layout, cell.name); in onie_tlv_add_cells() 131 of_node_put(layout); in onie_tlv_add_cells() 138 of_node_put(layout); in onie_tlv_add_cells() 187 struct nvmem_device *nvmem = layout->nvmem; in onie_tlv_parse_table() 188 struct device *dev = &layout->dev; in onie_tlv_parse_table() 232 layout->add_cells = onie_tlv_parse_table; in onie_tlv_probe() 234 return nvmem_layout_register(layout); in onie_tlv_probe() [all …]
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| A D | sl28vpd.c | 83 static int sl28vpd_add_cells(struct nvmem_layout *layout) in sl28vpd_add_cells() argument 85 struct nvmem_device *nvmem = layout->nvmem; in sl28vpd_add_cells() 86 struct device *dev = &layout->dev; in sl28vpd_add_cells() 139 static int sl28vpd_probe(struct nvmem_layout *layout) in sl28vpd_probe() argument 141 layout->add_cells = sl28vpd_add_cells; in sl28vpd_probe() 143 return nvmem_layout_register(layout); in sl28vpd_probe() 146 static void sl28vpd_remove(struct nvmem_layout *layout) in sl28vpd_remove() argument 148 nvmem_layout_unregister(layout); in sl28vpd_remove()
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| A D | u-boot-env.c | 168 static int u_boot_env_add_cells(struct nvmem_layout *layout) in u_boot_env_add_cells() argument 170 struct device *dev = &layout->dev; in u_boot_env_add_cells() 175 return u_boot_env_parse(dev, layout->nvmem, format); in u_boot_env_add_cells() 178 static int u_boot_env_probe(struct nvmem_layout *layout) in u_boot_env_probe() argument 180 layout->add_cells = u_boot_env_add_cells; in u_boot_env_probe() 182 return nvmem_layout_register(layout); in u_boot_env_probe() 185 static void u_boot_env_remove(struct nvmem_layout *layout) in u_boot_env_remove() argument 187 nvmem_layout_unregister(layout); in u_boot_env_remove()
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| /drivers/gpu/drm/atmel-hlcdc/ |
| A D | atmel_hlcdc_plane.c | 390 if (desc->layout.size) in atmel_hlcdc_plane_update_pos_and_size() 395 if (desc->layout.memsize) in atmel_hlcdc_plane_update_pos_and_size() 397 desc->layout.memsize, in atmel_hlcdc_plane_update_pos_and_size() 401 if (desc->layout.pos) in atmel_hlcdc_plane_update_pos_and_size() 633 layout = &primary->layer.desc->layout; in atmel_hlcdc_plane_prepare_disc_area() 634 if (!layout->disc_pos || !layout->disc_size) in atmel_hlcdc_plane_prepare_disc_area() 687 layout = &plane->layer.desc->layout; in atmel_hlcdc_plane_update_disc_area() 688 if (!layout->disc_pos || !layout->disc_size) in atmel_hlcdc_plane_update_disc_area() 970 if (desc->layout.vxs_config && desc->layout.hxs_config) { in atmel_xlcdc_csc_init() 1005 if (desc->layout.xstride[0] && desc->layout.pstride[0]) { in atmel_hlcdc_plane_init_properties() [all …]
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| A D | atmel_hlcdc_dc.c | 43 .layout = { 74 .layout = { 90 .layout = { 109 .layout = { 133 .layout = { 168 .layout = { 184 .layout = { 203 .layout = { 222 .layout = { 250 .layout = { [all …]
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| /drivers/mfd/ |
| A D | atmel-smc.c | 273 const struct atmel_hsmc_reg_layout *layout, in atmel_hsmc_cs_conf_apply() argument 276 regmap_write(regmap, ATMEL_HSMC_SETUP(layout, cs), conf->setup); in atmel_hsmc_cs_conf_apply() 277 regmap_write(regmap, ATMEL_HSMC_PULSE(layout, cs), conf->pulse); in atmel_hsmc_cs_conf_apply() 278 regmap_write(regmap, ATMEL_HSMC_CYCLE(layout, cs), conf->cycle); in atmel_hsmc_cs_conf_apply() 279 regmap_write(regmap, ATMEL_HSMC_TIMINGS(layout, cs), conf->timings); in atmel_hsmc_cs_conf_apply() 280 regmap_write(regmap, ATMEL_HSMC_MODE(layout, cs), conf->mode); in atmel_hsmc_cs_conf_apply() 314 const struct atmel_hsmc_reg_layout *layout, in atmel_hsmc_cs_conf_get() argument 317 regmap_read(regmap, ATMEL_HSMC_SETUP(layout, cs), &conf->setup); in atmel_hsmc_cs_conf_get() 318 regmap_read(regmap, ATMEL_HSMC_PULSE(layout, cs), &conf->pulse); in atmel_hsmc_cs_conf_get() 319 regmap_read(regmap, ATMEL_HSMC_CYCLE(layout, cs), &conf->cycle); in atmel_hsmc_cs_conf_get() [all …]
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| /drivers/mtd/nand/spi/ |
| A D | otp.c | 25 const struct spinand_otp_layout *layout) in spinand_otp_size() argument 27 return layout->npages * spinand_otp_page_size(spinand); in spinand_otp_size() 54 const struct spinand_otp_layout *layout) in spinand_otp_check_bounds() argument 66 &spinand->user_otp->layout); in spinand_user_otp_check_bounds() 71 const struct spinand_otp_layout *layout) in spinand_otp_rw() argument 92 req.pos.page = page + layout->start_page; in spinand_otp_rw() 141 &spinand->fact_otp->layout); in spinand_fact_otp_read() 158 &spinand->user_otp->layout); in spinand_user_otp_read() 175 &spinand->user_otp->layout); in spinand_user_otp_write() 223 is_fact ? &spinand->fact_otp->layout : in spinand_mtd_otp_read() [all …]
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| /drivers/md/ |
| A D | raid5.h | 764 static inline int algorithm_valid_raid5(int layout) in algorithm_valid_raid5() argument 766 return (layout >= 0) && in algorithm_valid_raid5() 767 (layout <= 5); in algorithm_valid_raid5() 769 static inline int algorithm_valid_raid6(int layout) in algorithm_valid_raid6() argument 771 return (layout >= 0 && layout <= 5) in algorithm_valid_raid6() 773 (layout >= 8 && layout <= 10) in algorithm_valid_raid6() 775 (layout >= 16 && layout <= 20); in algorithm_valid_raid6() 778 static inline int algorithm_is_DDF(int layout) in algorithm_is_DDF() argument 780 return layout >= 8 && layout <= 10; in algorithm_is_DDF()
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| A D | dm-raid.c | 532 return layout & 0xFF; in __raid10_near_copies() 544 return !!(layout & RAID10_OFFSET); in __is_raid10_offset() 550 return !__is_raid10_offset(layout) && __raid10_near_copies(layout) > 1; in __is_raid10_near() 556 return !__is_raid10_offset(layout) && __raid10_far_copies(layout) > 1; in __is_raid10_far() 568 if (__is_raid10_offset(layout)) in raid10_md_layout_to_format() 596 return max(__raid10_near_copies(layout), __raid10_far_copies(layout)); in raid10_md_layout_to_copies() 647 return __is_raid10_far(layout); in __got_raid10() 676 (__got_raid10(rtp, layout) || rtp->algorithm == layout)) in get_raid_type_by_ll() 1981 __le32 layout; member 2149 sb->layout = cpu_to_le32(mddev->layout); in super_sync() [all …]
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| /drivers/gpu/drm/i915/gt/uc/ |
| A D | intel_gsc_fw.c | 84 size_t min_size = sizeof(*layout); in intel_gsc_fw_get_binary_info() 142 min_size = layout->boot1.offset + layout->boot1.size; in intel_gsc_fw_get_binary_info() 150 if (layout->boot1.size < min_size) { in intel_gsc_fw_get_binary_info() 152 layout->boot1.size, min_size); in intel_gsc_fw_get_binary_info() 156 bpdt_header = data + layout->boot1.offset; in intel_gsc_fw_get_binary_info() 164 if (layout->boot1.size < min_size) { in intel_gsc_fw_get_binary_info() 166 layout->boot1.size, min_size); in intel_gsc_fw_get_binary_info() 186 if (layout->boot1.size < min_size) { in intel_gsc_fw_get_binary_info() 188 layout->boot1.size, min_size); in intel_gsc_fw_get_binary_info() 199 if (layout->boot1.size < min_size) { in intel_gsc_fw_get_binary_info() [all …]
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| /drivers/comedi/drivers/ |
| A D | cb_pcidas64.c | 676 .layout = LAYOUT_64XX, 692 .layout = LAYOUT_64XX, 708 .layout = LAYOUT_64XX, 724 .layout = LAYOUT_64XX, 740 .layout = LAYOUT_64XX, 755 .layout = LAYOUT_60XX, 771 .layout = LAYOUT_60XX, 786 .layout = LAYOUT_60XX, 802 .layout = LAYOUT_60XX, 818 .layout = LAYOUT_60XX, [all …]
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