| /drivers/gpu/host1x/ |
| A D | dev.c | 145 { /* SE1 */ .base = 0x1ac8, .offset = 0x90, .limit = 0x90 },
146 { /* SE2 */ .base = 0x1ad0, .offset = 0x90, .limit = 0x90 },
147 { /* SE3 */ .base = 0x1ad8, .offset = 0x90, .limit = 0x90 },
148 { /* SE4 */ .base = 0x1ae0, .offset = 0x90, .limit = 0x90 },
149 { /* ISP */ .base = 0x1ae8, .offset = 0x50, .limit = 0x50 },
150 { /* VIC */ .base = 0x1af0, .offset = 0x30, .limit = 0x34 },
151 { /* NVENC */ .base = 0x1af8, .offset = 0x30, .limit = 0x34 },
152 { /* NVDEC */ .base = 0x1b00, .offset = 0x30, .limit = 0x34 },
153 { /* NVJPG */ .base = 0x1b08, .offset = 0x30, .limit = 0x34 },
154 { /* TSEC */ .base = 0x1b10, .offset = 0x30, .limit = 0x34 },
[all …]
|
| /drivers/clk/bcm/ |
| A D | clk-kona-setup.c | 21 u32 limit; in ccu_data_offsets_valid() local
24 limit = round_down(limit, sizeof(u32)); in ccu_data_offsets_valid()
80 u32 limit; in peri_clk_data_offsets_valid() local
87 limit = range - sizeof(u32); in peri_clk_data_offsets_valid()
88 limit = round_down(limit, sizeof(u32)); in peri_clk_data_offsets_valid()
102 if (gate->offset > limit) { in peri_clk_data_offsets_valid()
142 if (sel->offset > limit) { in peri_clk_data_offsets_valid()
176 if (bit_posn > limit) { in bit_posn_valid()
291 u32 limit; in sel_valid() local
303 if (max_sel > limit) { in sel_valid()
[all …]
|
| /drivers/gpu/drm/i915/display/ |
| A D | intel_dpll.c | 585 if (clock->n < limit->n.min || limit->n.max < clock->n) in intel_pll_is_valid()
587 if (clock->p1 < limit->p1.min || limit->p1.max < clock->p1) in intel_pll_is_valid()
589 if (clock->m2 < limit->m2.min || limit->m2.max < clock->m2) in intel_pll_is_valid()
602 if (clock->p < limit->p.min || limit->p.max < clock->p) in intel_pll_is_valid()
604 if (clock->m < limit->m.min || limit->m.max < clock->m) in intel_pll_is_valid()
668 for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; in i9xx_find_best_dpll()
682 limit, in i9xx_find_best_dpll()
726 for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; in pnv_find_best_dpll()
738 limit, in pnv_find_best_dpll()
799 limit, in g4x_find_best_dpll()
[all …]
|
| /drivers/gpu/drm/gma500/ |
| A D | oaktrail_crtc.c | 106 limit = NULL; in mrst_limit()
110 return limit; in mrst_limit()
137 for (clock.m = limit->m.min; clock.m <= limit->m.max; clock.m++) { in mrst_sdvo_find_best_pll()
138 for (clock.n = limit->n.min; clock.n <= limit->n.max; in mrst_sdvo_find_best_pll()
140 for (clock.p1 = limit->p1.min; in mrst_sdvo_find_best_pll()
147 if (target_vco > limit->vco.max) in mrst_sdvo_find_best_pll()
150 if (target_vco < limit->vco.min) in mrst_sdvo_find_best_pll()
194 for (clock.m = limit->m.min; clock.m <= limit->m.max; clock.m++) { in mrst_lvds_find_best_pll()
195 for (clock.p1 = limit->p1.min; clock.p1 <= limit->p1.max; in mrst_lvds_find_best_pll()
372 const struct gma_limit_t *limit; in oaktrail_crtc_mode_set() local
[all …]
|
| A D | gma_display.c | 723 if (clock->p1 < limit->p1.min || limit->p1.max < clock->p1) in gma_pll_is_valid()
725 if (clock->p < limit->p.min || limit->p.max < clock->p) in gma_pll_is_valid()
727 if (clock->m2 < limit->m2.min || limit->m2.max < clock->m2) in gma_pll_is_valid()
729 if (clock->m1 < limit->m1.min || limit->m1.max < clock->m1) in gma_pll_is_valid()
734 if (clock->m < limit->m.min || limit->m.max < clock->m) in gma_pll_is_valid()
736 if (clock->n < limit->n.min || limit->n.max < clock->n) in gma_pll_is_valid()
738 if (clock->vco < limit->vco.min || limit->vco.max < clock->vco) in gma_pll_is_valid()
744 if (clock->dot < limit->dot.min || limit->dot.max < clock->dot) in gma_pll_is_valid()
783 for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; clock.m1++) { in gma_find_best_pll()
787 for (clock.n = limit->n.min; in gma_find_best_pll()
[all …]
|
| /drivers/gpu/drm/radeon/ |
| A D | kv_smc.c | 75 u32 smc_address, u32 limit) in kv_set_smc_sram_address() argument
79 if ((smc_address + 3) > limit) in kv_set_smc_sram_address()
89 u32 *value, u32 limit) in kv_read_smc_sram_dword() argument
93 ret = kv_set_smc_sram_address(rdev, smc_address, limit); in kv_read_smc_sram_dword()
119 const u8 *src, u32 byte_count, u32 limit) in kv_copy_bytes_to_smc() argument
124 if ((smc_start_address + byte_count) > limit) in kv_copy_bytes_to_smc()
134 ret = kv_set_smc_sram_address(rdev, addr, limit); in kv_copy_bytes_to_smc()
160 ret = kv_set_smc_sram_address(rdev, addr, limit); in kv_copy_bytes_to_smc()
173 ret = kv_set_smc_sram_address(rdev, addr, limit); in kv_copy_bytes_to_smc()
188 ret = kv_set_smc_sram_address(rdev, addr, limit); in kv_copy_bytes_to_smc()
[all …]
|
| A D | rv770_smc.c | 266 u16 smc_address, u16 limit) in rv770_set_smc_sram_address() argument
272 if ((smc_address + 3) > limit) in rv770_set_smc_sram_address()
285 u16 byte_count, u16 limit) in rv770_copy_bytes_to_smc() argument
294 if ((smc_start_address + byte_count) > limit) in rv770_copy_bytes_to_smc()
461 for (i = 0; i < limit; i += 4) { in rv770_clear_smc_sram()
462 rv770_set_smc_sram_address(rdev, i, limit); in rv770_clear_smc_sram()
469 u16 limit) in rv770_load_smc_ucode() argument
482 rv770_clear_smc_sram(rdev, limit); in rv770_load_smc_ucode()
578 ucode_data, ucode_size, limit); in rv770_load_smc_ucode()
592 u16 smc_address, u32 *value, u16 limit) in rv770_read_smc_sram_dword() argument
[all …]
|
| A D | ci_smc.c | 34 u32 smc_address, u32 limit) in ci_set_smc_sram_address() argument
38 if ((smc_address + 3) > limit) in ci_set_smc_sram_address()
49 const u8 *src, u32 byte_count, u32 limit) in ci_copy_bytes_to_smc() argument
59 if ((smc_start_address + byte_count) > limit) in ci_copy_bytes_to_smc()
69 ret = ci_set_smc_sram_address(rdev, addr, limit); in ci_copy_bytes_to_smc()
84 ret = ci_set_smc_sram_address(rdev, addr, limit); in ci_copy_bytes_to_smc()
101 ret = ci_set_smc_sram_address(rdev, addr, limit); in ci_copy_bytes_to_smc()
247 u32 smc_address, u32 *value, u32 limit) in ci_read_smc_sram_dword() argument
253 ret = ci_set_smc_sram_address(rdev, smc_address, limit); in ci_read_smc_sram_dword()
262 u32 smc_address, u32 value, u32 limit) in ci_write_smc_sram_dword() argument
[all …]
|
| A D | si_smc.c | 34 u32 smc_address, u32 limit) in si_set_smc_sram_address() argument
38 if ((smc_address + 3) > limit) in si_set_smc_sram_address()
49 const u8 *src, u32 byte_count, u32 limit) in si_copy_bytes_to_smc() argument
57 if ((smc_start_address + byte_count) > limit) in si_copy_bytes_to_smc()
67 ret = si_set_smc_sram_address(rdev, addr, limit); in si_copy_bytes_to_smc()
82 ret = si_set_smc_sram_address(rdev, addr, limit); in si_copy_bytes_to_smc()
100 ret = si_set_smc_sram_address(rdev, addr, limit); in si_copy_bytes_to_smc()
283 u32 *value, u32 limit) in si_read_smc_sram_dword() argument
289 ret = si_set_smc_sram_address(rdev, smc_address, limit); in si_read_smc_sram_dword()
298 u32 value, u32 limit) in si_write_smc_sram_dword() argument
[all …]
|
| /drivers/gpu/drm/amd/pm/legacy-dpm/ |
| A D | kv_smc.c | 78 u32 smc_address, u32 limit) in kv_set_smc_sram_address() argument
82 if ((smc_address + 3) > limit) in kv_set_smc_sram_address()
93 u32 *value, u32 limit) in amdgpu_kv_read_smc_sram_dword() argument
97 ret = kv_set_smc_sram_address(adev, smc_address, limit); in amdgpu_kv_read_smc_sram_dword()
123 const u8 *src, u32 byte_count, u32 limit) in amdgpu_kv_copy_bytes_to_smc() argument
128 if ((smc_start_address + byte_count) > limit) in amdgpu_kv_copy_bytes_to_smc()
138 ret = kv_set_smc_sram_address(adev, addr, limit); in amdgpu_kv_copy_bytes_to_smc()
164 ret = kv_set_smc_sram_address(adev, addr, limit); in amdgpu_kv_copy_bytes_to_smc()
177 ret = kv_set_smc_sram_address(adev, addr, limit); in amdgpu_kv_copy_bytes_to_smc()
192 ret = kv_set_smc_sram_address(adev, addr, limit); in amdgpu_kv_copy_bytes_to_smc()
[all …]
|
| A D | si_smc.c | 40 u32 smc_address, u32 limit) in si_set_smc_sram_address() argument
44 if ((smc_address + 3) > limit) in si_set_smc_sram_address()
55 const u8 *src, u32 byte_count, u32 limit) in amdgpu_si_copy_bytes_to_smc() argument
63 if ((smc_start_address + byte_count) > limit) in amdgpu_si_copy_bytes_to_smc()
73 ret = si_set_smc_sram_address(adev, addr, limit); in amdgpu_si_copy_bytes_to_smc()
88 ret = si_set_smc_sram_address(adev, addr, limit); in amdgpu_si_copy_bytes_to_smc()
104 ret = si_set_smc_sram_address(adev, addr, limit); in amdgpu_si_copy_bytes_to_smc()
252 u32 *value, u32 limit) in amdgpu_si_read_smc_sram_dword() argument
258 ret = si_set_smc_sram_address(adev, smc_address, limit); in amdgpu_si_read_smc_sram_dword()
267 u32 value, u32 limit) in amdgpu_si_write_smc_sram_dword() argument
[all …]
|
| /drivers/net/wireless/ath/ath9k/ |
| A D | calib.c | 43 struct ath_nf_limits *limit; in ath9k_hw_get_nf_limits() local
46 limit = &ah->nf_2g; in ath9k_hw_get_nf_limits()
48 limit = &ah->nf_5g; in ath9k_hw_get_nf_limits()
50 return limit; in ath9k_hw_get_nf_limits()
85 struct ath_nf_limits *limit; in ath9k_hw_update_nfcal_hist_buffer() local
371 limit = &ah->nf_2g; in ath9k_hw_nf_sanitize()
373 limit = &ah->nf_5g; in ath9k_hw_nf_sanitize()
386 i, nf[i], limit->max); in ath9k_hw_nf_sanitize()
387 nf[i] = limit->max; in ath9k_hw_nf_sanitize()
391 i, nf[i], limit->min); in ath9k_hw_nf_sanitize()
[all …]
|
| /drivers/gpu/drm/amd/amdgpu/ |
| A D | amdgpu_eeprom.c | 185 u16 limit; in amdgpu_eeprom_xfer() local
190 limit = 0; in amdgpu_eeprom_xfer()
192 limit = quirks->max_read_len; in amdgpu_eeprom_xfer()
194 limit = quirks->max_write_len; in amdgpu_eeprom_xfer()
196 if (limit == 0) { in amdgpu_eeprom_xfer()
199 } else if (limit <= EEPROM_OFFSET_SIZE) { in amdgpu_eeprom_xfer()
211 limit -= EEPROM_OFFSET_SIZE; in amdgpu_eeprom_xfer()
214 ps = min(limit, buf_size); in amdgpu_eeprom_xfer()
|
| /drivers/perf/ |
| A D | arm_spe_pmu.c | 408 limit >>= 1; in arm_spe_pmu_next_snapshot_off()
420 return limit; in arm_spe_pmu_next_snapshot_off()
428 u64 limit = bufsize; in __arm_spe_pmu_next_off() local
481 limit = min(limit, round_up(wakeup, PAGE_SIZE)); in __arm_spe_pmu_next_off()
483 if (limit > head) in __arm_spe_pmu_next_off()
484 return limit; in __arm_spe_pmu_next_off()
504 if (limit && (limit - head < spe_pmu->max_record_sz)) { in arm_spe_pmu_next_off()
509 return limit; in arm_spe_pmu_next_off()
515 u64 base, limit; in arm_spe_perf_aux_output_begin() local
532 limit = 0; in arm_spe_perf_aux_output_begin()
[all …]
|
| /drivers/char/tpm/eventlog/ |
| A D | tpm2.c | 47 void *limit = log->bios_event_log_end; in tpm2_bios_measurements_start() local
57 if (addr + size < limit) { in tpm2_bios_measurements_start()
69 if ((addr + size >= limit) || (size == 0)) in tpm2_bios_measurements_start()
77 if ((addr + size >= limit) || (size == 0)) in tpm2_bios_measurements_start()
92 void *limit = log->bios_event_log_end; in tpm2_bios_measurements_next() local
112 if (marker >= limit) in tpm2_bios_measurements_next()
118 if (((v + event_size) >= limit) || (event_size == 0)) in tpm2_bios_measurements_next()
|
| /drivers/power/supply/ |
| A D | sc2731_charger.c | 64 u32 limit; member
92 u32 limit) in sc2731_charger_set_current_limit() argument
96 if (limit <= SC2731_CURRENT_LIMIT_100) in sc2731_charger_set_current_limit()
98 else if (limit <= SC2731_CURRENT_LIMIT_500) in sc2731_charger_set_current_limit()
100 else if (limit <= SC2731_CURRENT_LIMIT_900) in sc2731_charger_set_current_limit()
331 if (info->limit > 0 && !info->charging) { in sc2731_charger_work()
337 ret = sc2731_charger_set_current(info, info->limit); in sc2731_charger_work()
346 } else if (!info->limit && info->charging) { in sc2731_charger_work()
357 unsigned long limit, void *data) in sc2731_charger_usb_change() argument
362 info->limit = limit; in sc2731_charger_usb_change()
[all …]
|
| /drivers/tty/serial/ |
| A D | sunhv.c | 77 int limit = 10000; in receive_chars_getchar() local
79 while (limit-- > 0) { in receive_chars_getchar()
120 int limit = 10000; in receive_chars_read() local
122 while (limit-- > 0) { in receive_chars_read()
274 int limit = 10000; in sunhv_send_xchar() local
281 while (limit-- > 0) { in sunhv_send_xchar()
301 int limit = 10000; in sunhv_break_ctl() local
461 while (limit--) { in sunhv_console_write_paged()
470 if (limit < 0) in sunhv_console_write_paged()
483 int limit = 1000000; in sunhv_console_putchar() local
[all …]
|
| /drivers/vhost/ |
| A D | iotlb.c | 75 if (iotlb->limit && in vhost_iotlb_add_range_ctx()
76 iotlb->nmaps == iotlb->limit && in vhost_iotlb_add_range_ctx()
134 void vhost_iotlb_init(struct vhost_iotlb *iotlb, unsigned int limit, in vhost_iotlb_init() argument
138 iotlb->limit = limit; in vhost_iotlb_init()
152 struct vhost_iotlb *vhost_iotlb_alloc(unsigned int limit, unsigned int flags) in vhost_iotlb_alloc() argument
159 vhost_iotlb_init(iotlb, limit, flags); in vhost_iotlb_alloc()
|
| /drivers/gpu/drm/nouveau/nvkm/subdev/bios/ |
| A D | shadowacpi.c | 66 u32 limit = (offset + length + 0xfff) & ~0xfff; in acpi_read_fast() local
68 u32 fetch = limit - start; in acpi_read_fast()
70 if (nvbios_extend(bios, limit) >= 0) { in acpi_read_fast()
87 u32 limit = (offset + length + 0xfff) & ~0xfff; in acpi_read_slow() local
91 if (nvbios_extend(bios, limit) >= 0) { in acpi_read_slow()
92 while (start + fetch < limit) { in acpi_read_slow()
|
| /drivers/usb/mon/ |
| A D | mon_text.c | 101 int cnt, limit; member
413 ptr.limit = rp->printf_size; in mon_text_read_t()
452 ptr.limit = rp->printf_size; in mon_text_read_u()
523 p->cnt += scnprintf(p->pbuf + p->cnt, p->limit - p->cnt, in mon_text_read_head_t()
541 p->cnt += scnprintf(p->pbuf + p->cnt, p->limit - p->cnt, in mon_text_read_head_u()
552 p->cnt += scnprintf(p->pbuf + p->cnt, p->limit - p->cnt, in mon_text_read_statset()
560 p->cnt += scnprintf(p->pbuf + p->cnt, p->limit - p->cnt, in mon_text_read_statset()
571 p->cnt += scnprintf(p->pbuf + p->cnt, p->limit - p->cnt, in mon_text_read_intstat()
595 p->cnt += scnprintf(p->pbuf + p->cnt, p->limit - p->cnt, in mon_text_read_isodesc()
624 p->limit - p->cnt, in mon_text_read_data()
[all …]
|
| /drivers/gpu/drm/nouveau/nvkm/subdev/bar/ |
| A D | nv50.c | 112 u64 start, limit, size; in nv50_bar_oneinit() local
133 limit = start + size; in nv50_bar_oneinit()
135 ret = nvkm_vmm_new(device, start, limit-- - start, NULL, 0, in nv50_bar_oneinit()
157 nvkm_wo32(bar->bar2, 0x04, lower_32_bits(limit)); in nv50_bar_oneinit()
159 nvkm_wo32(bar->bar2, 0x0c, upper_32_bits(limit) << 24 | in nv50_bar_oneinit()
173 limit = start + size; in nv50_bar_oneinit()
175 ret = nvkm_vmm_new(device, start, limit-- - start, NULL, 0, in nv50_bar_oneinit()
193 nvkm_wo32(bar->bar1, 0x04, lower_32_bits(limit)); in nv50_bar_oneinit()
195 nvkm_wo32(bar->bar1, 0x0c, upper_32_bits(limit) << 24 | in nv50_bar_oneinit()
|
| /drivers/clk/sophgo/ |
| A D | clk-cv18xx-pll.c | 47 static int ipll_find_rate(const struct cv1800_clk_pll_limit *limit, in ipll_find_rate() argument
58 for_each_pll_limit_range(pre, &limit->pre_div) { in ipll_find_rate()
59 for_each_pll_limit_range(div, &limit->div) { in ipll_find_rate()
60 for_each_pll_limit_range(post, &limit->post_div) { in ipll_find_rate()
101 const struct cv1800_clk_pll_limit *limit, in pll_get_mode_ctrl() argument
107 for_each_pll_limit_range(mode, &limit->mode) { in pll_get_mode_ctrl()
108 for_each_pll_limit_range(ictrl, &limit->ictrl) { in pll_get_mode_ctrl()
283 const struct cv1800_clk_pll_limit *limit, in fpll_find_rate() argument
297 for_each_pll_limit_range(pre, &limit->pre_div) { in fpll_find_rate()
298 for_each_pll_limit_range(post, &limit->post_div) { in fpll_find_rate()
[all …]
|
| /drivers/leds/ |
| A D | leds-cpcap.c | 20 u16 limit; member
28 .limit = 31,
34 .limit = 31,
40 .limit = 31,
47 .limit = 1,
56 .limit = 1,
204 led->led.max_brightness = led->info->limit; in cpcap_led_probe()
|
| /drivers/net/ethernet/stmicro/stmmac/ |
| A D | stmmac_hwtstamp.c | 138 int limit; in config_addend() local
147 limit = 10; in config_addend()
148 while (limit--) { in config_addend()
153 if (limit < 0) in config_addend()
163 int limit; in adjust_systime() local
190 limit = 10; in adjust_systime()
191 while (limit--) { in adjust_systime()
196 if (limit < 0) in adjust_systime()
|
| /drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
| A D | nv44.c | 45 nvkm_wr32(device, NV20_PGRAPH_TLIMIT(i), tile->limit); in nv44_gr_tile()
54 nvkm_wr32(device, NV47_PGRAPH_TLIMIT(i), tile->limit); in nv44_gr_tile()
57 nvkm_wr32(device, NV40_PGRAPH_TLIMIT1(i), tile->limit); in nv44_gr_tile()
62 nvkm_wr32(device, NV20_PGRAPH_TLIMIT(i), tile->limit); in nv44_gr_tile()
65 nvkm_wr32(device, NV40_PGRAPH_TLIMIT1(i), tile->limit); in nv44_gr_tile()
|