| /drivers/gpu/drm/imagination/ |
| A D | pvr_power.c | 522 int link_count; in pvr_power_domains_init() local 536 link_count = domain_count + (domain_count - 1); in pvr_power_domains_init() 542 domain_links = kcalloc(link_count, sizeof(*domain_links), GFP_KERNEL); in pvr_power_domains_init() 571 for (i = domain_count; i < link_count; i++) { in pvr_power_domains_init()
|
| /drivers/gpu/drm/amd/display/dc/link/ |
| A D | link_validation.c | 395 uint8_t link_count = 0; in link_validate_dp_tunnel_bandwidth() local 428 link_count++; in link_validate_dp_tunnel_bandwidth() 441 if (link_count && link_dpia_validate_dp_tunnel_bandwidth(dpia_link_sets, link_count) == false) in link_validate_dp_tunnel_bandwidth()
|
| A D | link_dpms.c | 83 for (i = 0; i < dc->link_count; i++) { in link_blank_all_dp_displays() 106 for (i = 0; i < dc->link_count; i++) { in link_blank_all_edp_displays()
|
| /drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc.c | 160 for (i = 0; i < dc->link_count; i++) { in destroy_links() 200 dc->link_count = 0; in create_links() 235 dc->links[dc->link_count] = link; in create_links() 237 ++dc->link_count; in create_links() 260 dc->links[dc->link_count] = link; in create_links() 262 ++dc->link_count; in create_links() 275 link->link_index = dc->link_count; in create_links() 276 dc->links[dc->link_count] = link; in create_links() 277 dc->link_count++; in create_links() 1485 dc->caps.max_links = dc->link_count; in dc_create() [all …]
|
| A D | dc_link_exports.c | 53 for (i = 0; i < dc->link_count; i++) { in dc_get_edp_links()
|
| /drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| A D | dcn35_hwseq.c | 179 for (i = 0; i < dc->link_count; i++) { in dcn35_init_hw() 250 for (i = 0; i < dc->link_count; i++) { in dcn35_init_hw() 619 for (i = 0; i < dc->link_count; i++) { in dcn35_power_down_on_boot() 1069 for (i = 0; i < dc->link_count; i++) { in dcn35_calc_blocks_to_gate() 1186 for (i = 0; i < dc->link_count; i++) in dcn35_calc_blocks_to_ungate()
|
| /drivers/gpu/drm/amd/display/dc/hwss/dcn31/ |
| A D | dcn31_hwseq.c | 156 for (i = 0; i < dc->link_count; i++) { in dcn31_init_hw() 225 for (i = 0; i < dc->link_count; i++) { in dcn31_init_hw()
|
| /drivers/gpu/drm/amd/display/dc/hwss/dcn30/ |
| A D | dcn30_hwseq.c | 701 for (i = 0; i < dc->link_count; i++) { in dcn30_init_hw() 760 for (i = 0; i < dc->link_count; i++) { in dcn30_init_hw() 780 for (i = 0; i < dc->link_count; i++) { in dcn30_init_hw()
|
| /drivers/gpu/drm/i915/display/ |
| A D | intel_crtc_state_dump.c | 225 pipe_config->splitter.link_count, in intel_crtc_state_dump()
|
| A D | intel_display_types.h | 1333 u8 link_count; member
|
| A D | intel_dp.c | 3003 pixel_clock /= pipe_config->splitter.link_count; in intel_dp_drrs_compute_config() 3012 pipe_config->dp_m2_n2.data_m *= pipe_config->splitter.link_count; in intel_dp_drrs_compute_config() 3262 pipe_config->splitter.link_count = n; in intel_dp_compute_config() 3295 pipe_config->dp_m_n.data_m *= pipe_config->splitter.link_count; in intel_dp_compute_config()
|
| /drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| A D | dcn32_hwseq.c | 832 for (i = 0; i < dc->link_count; i++) { in dcn32_init_hw() 917 for (i = 0; i < dc->link_count; i++) { in dcn32_init_hw() 937 for (i = 0; i < dc->link_count; i++) { in dcn32_init_hw()
|
| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
| A D | dcn316_clk_mgr.c | 86 for (i = 0; i < dc->link_count; i++) { in dcn316_get_active_display_cnt_wa()
|
| /drivers/gpu/drm/amd/display/dc/hwss/dcn201/ |
| A D | dcn201_hwseq.c | 259 for (i = 0; i < dc->link_count; i++) { in dcn201_init_hw()
|
| /drivers/gpu/drm/amd/display/dc/hwss/dce110/ |
| A D | dce110_hwseq.c | 1734 for (i = 0; i < dc->link_count; i++) { in power_down_encoders() 1840 for (i = 0; i < dc->link_count; i++) { in get_edp_links_with_sink() 2831 for (i = 0; i < dc->link_count; i++) { in dce110_init_hw() 2857 for (i = 0; i < dc->link_count; i++) { in dce110_init_hw()
|
| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
| A D | rn_clk_mgr.c | 70 for (i = 0; i < dc->link_count; i++) { in rn_get_active_display_cnt_wa()
|
| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| A D | vg_clk_mgr.c | 79 for (i = 0; i < dc->link_count; i++) { in vg_get_active_display_cnt_wa()
|
| /drivers/staging/rtl8723bs/include/ |
| A D | rtw_mlme_ext.h | 281 u32 link_count; member
|
| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
| A D | dcn315_clk_mgr.c | 74 for (i = 0; i < dc->link_count; i++) { in dcn315_get_active_display_cnt_wa()
|
| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| A D | dcn31_clk_mgr.c | 98 for (i = 0; i < dc->link_count; i++) { in dcn31_get_active_display_cnt_wa()
|
| /drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_dmcu.c | 398 for (i = 0; i < ctx->dc->link_count; i++) { in dcn10_dmcu_init()
|
| /drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| A D | dcn10_hwseq.c | 686 for (i = 0; i < dc->link_count; i++) { in dcn10_log_hw_state() 1779 for (i = 0; i < dc->link_count; i++) { in dcn10_init_hw() 1828 for (i = 0; i < dc->link_count; i++) { in dcn10_init_hw() 1889 for (i = 0; i < dc->link_count; i++) { in dcn10_power_down_on_boot()
|
| /drivers/staging/rtl8723bs/core/ |
| A D | rtw_mlme_ext.c | 247 pmlmeinfo->link_count = 0; in init_mlme_ext_priv_value() 4196 pmlmeinfo->link_count = 0; in start_clnt_auth() 5028 pmlmeinfo->link_count++ == link_count_limit) in linked_status_chk() 5047 pmlmeinfo->link_count %= (link_count_limit+1); in linked_status_chk() 5050 pmlmeinfo->link_count = 0; in linked_status_chk()
|
| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| A D | dcn314_clk_mgr.c | 132 for (i = 0; i < dc->link_count; i++) { in dcn314_get_active_display_cnt_wa()
|
| /drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| A D | dcn401_hwseq.c | 196 for (i = 0; i < dc->link_count; i++) { in dcn401_init_hw() 281 for (i = 0; i < dc->link_count; i++) { in dcn401_init_hw() 301 for (i = 0; i < dc->link_count; i++) { in dcn401_init_hw()
|