| /drivers/ssb/ |
| A D | main.c | 848 u32 n1, n2, clock, m1, m2, m3, mc; in ssb_calc_clock_rate() local
890 m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT); in ssb_calc_clock_rate()
904 m3 = clkfactor_f6_resolve(m3); in ssb_calc_clock_rate()
914 return (clock / (m1 * m2 * m3)); in ssb_calc_clock_rate()
916 return (clock / (m1 * m3)); in ssb_calc_clock_rate()
922 m3 += SSB_CHIPCO_CLK_T2_BIAS; in ssb_calc_clock_rate()
925 WARN_ON(!((m3 >= 2) && (m3 <= 7))); in ssb_calc_clock_rate()
932 clock /= m3; in ssb_calc_clock_rate()
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| /drivers/net/ethernet/broadcom/bnx2x/ |
| A D | bnx2x_init.h | 539 #define BLOCK_PRTY_INFO(block, en_mask, m1, m1h, m2, m3) \ argument
543 en_mask, {m1, m1h, m2, m3}, #block \
546 #define BLOCK_PRTY_INFO_0(block, en_mask, m1, m1h, m2, m3) \ argument
550 en_mask, {m1, m1h, m2, m3}, #block"_0" \
553 #define BLOCK_PRTY_INFO_1(block, en_mask, m1, m1h, m2, m3) \ argument
557 en_mask, {m1, m1h, m2, m3}, #block"_1" \
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| A D | bnx2x_fw_defs.h | 32 * IRO[142].m2) + ((sbId) * IRO[142].m3))
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| A D | bnx2x.h | 1195 u16 m3; member
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| A D | bnx2x_main.c | 13362 target[i].m3 = (tmp >> 16) & 0xffff; in bnx2x_prep_iro()
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| /drivers/media/common/saa7146/ |
| A D | saa7146_video.c | 107 int i, m1, m2, m3, o1, o2; in saa7146_pgtable_build() local
114 m3 = ((size + (size / 2) + PAGE_SIZE) / PAGE_SIZE) - 1; in saa7146_pgtable_build()
118 size, m1, m2, m3, o1, o2); in saa7146_pgtable_build()
125 m3 = ((2 * size + PAGE_SIZE) / PAGE_SIZE) - 1; in saa7146_pgtable_build()
129 size, m1, m2, m3, o1, o2); in saa7146_pgtable_build()
159 for (i = m2; i <= m3; i++, ptr3++) in saa7146_pgtable_build()
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| /drivers/net/ethernet/apm/xgene-v2/ |
| A D | ring.h | 59 __le64 m3; member
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| /drivers/dma/ |
| A D | xgene-dma.c | 203 __le64 m3; member
393 return &desc->m3; in xgene_dma_lookup_ext8()
410 desc->m3 |= cpu_to_le64((u64)dst_ring_num << in xgene_dma_init_desc()
432 desc1->m3 |= cpu_to_le64(*dst); in xgene_dma_prep_xor_desc()
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| /drivers/net/wireless/realtek/rtw89/ |
| A D | cam.h | 368 __le32 m3; member
445 __le32 m3; member
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| A D | fw.c | 2230 h2c->m3 = cpu_to_le32(DCTLINFO_V2_W3_ALL); in rtw89_fw_h2c_default_dmac_tbl_v2()
3202 h2c->m3 = cpu_to_le32(CCTLINFO_G7_W3_ALL); in rtw89_fw_h2c_default_cmac_tbl_g7()
3519 h2c->m3 = cpu_to_le32(CCTLINFO_G7_W3_RTS_TXCNT_LMT_SEL); in rtw89_fw_h2c_assoc_cmac_tbl_g7()
3630 h2c->m3 = cpu_to_le32(CCTLINFO_G7_W3_BA_BMAP); in rtw89_fw_h2c_ampdu_cmac_tbl_g7()
3715 h2c->m3 |= cpu_to_le32(CCTLINFO_G7_W3_AMPDU_TIME_SEL); in rtw89_fw_h2c_txtime_cmac_tbl_g7()
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| A D | fw.h | 1390 __le32 m3; member
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| /drivers/clk/ |
| A D | clk-versaclock7.c | 239 u64 m3 = a1 * b1; in vc7_64_mul_64_to_128() local
246 m3 += 0x100000000ull; in vc7_64_mul_64_to_128()
249 *hi = m3 + (m2 >> 32); in vc7_64_mul_64_to_128()
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| /drivers/net/ethernet/apm/xgene/ |
| A D | xgene_enet_hw.h | 326 __le64 m3; member
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| A D | xgene_enet_main.c | 253 if (GET_BIT(ET, le64_to_cpu(raw_desc->m3))) { in xgene_enet_tx_completion()
254 mss_index = GET_VAL(MSS, le64_to_cpu(raw_desc->m3)); in xgene_enet_tx_completion()
432 raw_desc->m3 = cpu_to_le64(SET_VAL(HENQNUM, tx_ring->dst_ring_num) | in xgene_enet_setup_tx_desc()
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| /drivers/clk/meson/ |
| A D | g12a-aoclk.c | 73 AXG_AO_GATE(m3, AO_CLK_GATE0_SP, 1);
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| /drivers/ata/ |
| A D | sata_mv.c | 3318 u32 m2, m3; in mv6_phy_errata() local
3339 m3 = readl(port_mmio + PHY_MODE3); in mv6_phy_errata()
3340 m3 = (m3 & 0x1f) | (0x5555601 << 5); in mv6_phy_errata()
3344 m3 &= ~0x1c; in mv6_phy_errata()
3365 writel(m3, port_mmio + PHY_MODE3); in mv6_phy_errata()
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| /drivers/pinctrl/ |
| A D | pinctrl-th1520.c | 150 #define TH1520_PAD(_nr, _name, m0, m1, m2, m3, m4, m5, _flags) \ argument
153 (TH1520_MUX_##m3 << 15) | (TH1520_MUX_##m4 << 20) | (TH1520_MUX_##m5 << 25)) }
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| /drivers/net/ethernet/qlogic/qed/ |
| A D | qed_hsi.h | 2338 u16 m3; member
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