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Searched refs:managed (Results 1 – 25 of 65) sorted by relevance

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/drivers/gpu/drm/
A Ddrm_managed.c70 list_for_each_entry_safe(dr, tmp, &dev->managed.resources, node.entry) { in drm_managed_release()
122 spin_lock_irqsave(&dev->managed.lock, flags); in add_dr()
123 list_add(&dr->node.entry, &dev->managed.resources); in add_dr()
124 spin_unlock_irqrestore(&dev->managed.lock, flags); in add_dr()
132 WARN_ON(dev->managed.final_kfree); in drmm_add_final_kfree()
135 dev->managed.final_kfree = container; in drmm_add_final_kfree()
198 spin_lock_irqsave(&dev->managed.lock, flags); in drmm_release_action()
208 spin_unlock_irqrestore(&dev->managed.lock, flags); in drmm_release_action()
290 spin_lock_irqsave(&dev->managed.lock, flags); in drmm_kfree()
291 list_for_each_entry(dr, &dev->managed.resources, node.entry) { in drmm_kfree()
[all …]
A Ddrm_drv.c719 INIT_LIST_HEAD(&dev->managed.resources); in drm_dev_init()
720 spin_lock_init(&dev->managed.lock); in drm_dev_init()
912 kfree(dev->managed.final_kfree); in drm_dev_release()
1063 WARN_ON(!dev->managed.final_kfree); in drm_dev_register()
/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/
A Dvmmgm200.c144 struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in gm200_vmm_new_() argument
168 return nvkm_vmm_new_(func, mmu, 0, managed, addr, size, key, name, pvmm); in gm200_vmm_new_()
172 gm200_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in gm200_vmm_new() argument
176 return gm200_vmm_new_(&gm200_vmm_16, &gm200_vmm_17, mmu, managed, addr, in gm200_vmm_new()
181 gm200_vmm_new_fixed(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in gm200_vmm_new_fixed() argument
185 return gf100_vmm_new_(&gm200_vmm_16, &gm200_vmm_17, mmu, managed, addr, in gm200_vmm_new_fixed()
A Dvmmgm20b.c57 gm20b_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in gm20b_vmm_new() argument
61 return gm200_vmm_new_(&gm20b_vmm_16, &gm20b_vmm_17, mmu, managed, addr, in gm20b_vmm_new()
66 gm20b_vmm_new_fixed(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in gm20b_vmm_new_fixed() argument
70 return gf100_vmm_new_(&gm20b_vmm_16, &gm20b_vmm_17, mmu, managed, addr, in gm20b_vmm_new_fixed()
A Dvmmnv04.c103 u32 pd_header, bool managed, u64 addr, u64 size, in nv04_vmm_new_() argument
112 ret = nvkm_vmm_new_(func, mmu, pd_header, managed, addr, size, in nv04_vmm_new_()
121 nv04_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in nv04_vmm_new() argument
129 ret = nv04_vmm_new_(&nv04_vmm, mmu, 8, managed, addr, size, in nv04_vmm_new()
A Duvmm.c61 if (nvkm_vmm_in_managed_range(vmm, addr, size) && vmm->managed.raw) in nvkm_uvmm_mthd_pfnclr()
94 if (nvkm_vmm_in_managed_range(vmm, addr, size) && vmm->managed.raw) in nvkm_uvmm_mthd_pfnmap()
122 if (nvkm_vmm_in_managed_range(vmm, addr, 0) && vmm->managed.raw) in nvkm_uvmm_mthd_unmap()
171 if (nvkm_vmm_in_managed_range(vmm, addr, size) && vmm->managed.raw) in nvkm_uvmm_mthd_map()
469 if (!uvmm->vmm->managed.raw) in nvkm_uvmm_mthd_raw()
544 bool managed, raw; in nvkm_uvmm_new() local
547 managed = args->v0.type == NVIF_VMM_V0_TYPE_MANAGED; in nvkm_uvmm_new()
561 ret = mmu->func->vmm.ctor(mmu, managed || raw, addr, size, in nvkm_uvmm_new()
573 uvmm->vmm->managed.raw = raw; in nvkm_uvmm_new()
A Dvmmmcp77.c39 mcp77_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in mcp77_vmm_new() argument
43 return nv04_vmm_new_(&mcp77_vmm, mmu, 0, managed, addr, size, in mcp77_vmm_new()
A Dvmmgp10b.c45 gp10b_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in gp10b_vmm_new() argument
49 return gp100_vmm_new_(&gp10b_vmm, mmu, managed, addr, size, in gp10b_vmm_new()
A Dvmmgk20a.c67 gk20a_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in gk20a_vmm_new() argument
71 return gf100_vmm_new_(&gk20a_vmm_16, &gk20a_vmm_17, mmu, managed, addr, in gk20a_vmm_new()
A Dvmmtu102.c73 tu102_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in tu102_vmm_new() argument
77 return gp100_vmm_new_(&tu102_vmm, mmu, managed, addr, size, in tu102_vmm_new()
A Dvmmgf100.c404 struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in gf100_vmm_new_() argument
409 case 16: return nv04_vmm_new_(func_16, mmu, 0, managed, addr, size, in gf100_vmm_new_()
411 case 17: return nv04_vmm_new_(func_17, mmu, 0, managed, addr, size, in gf100_vmm_new_()
420 gf100_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in gf100_vmm_new() argument
424 return gf100_vmm_new_(&gf100_vmm_16, &gf100_vmm_17, mmu, managed, addr, in gf100_vmm_new()
A Dvmmgk104.c98 gk104_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in gk104_vmm_new() argument
102 return gf100_vmm_new_(&gk104_vmm_16, &gk104_vmm_17, mmu, managed, addr, in gk104_vmm_new()
A Dvmmgv100.c83 gv100_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in gv100_vmm_new() argument
87 return gp100_vmm_new_(&gv100_vmm, mmu, managed, addr, size, in gv100_vmm_new()
A Dvmmnv41.c106 nv41_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in nv41_vmm_new() argument
110 return nv04_vmm_new_(&nv41_vmm, mmu, 0, managed, addr, size, in nv41_vmm_new()
A Dvmm.h165 u32 pd_header, bool managed, u64 addr, u64 size,
188 u64 p_start = vmm->managed.p.addr; in nvkm_vmm_in_managed_range()
189 u64 p_end = p_start + vmm->managed.p.size; in nvkm_vmm_in_managed_range()
190 u64 n_start = vmm->managed.n.addr; in nvkm_vmm_in_managed_range()
191 u64 n_end = n_start + vmm->managed.n.size; in nvkm_vmm_in_managed_range()
A Dvmmnv44.c208 nv44_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in nv44_vmm_new() argument
216 ret = nv04_vmm_new_(&nv44_vmm, mmu, 0, managed, addr, size, in nv44_vmm_new()
A Dvmmgp100.c604 struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in gp100_vmm_new_() argument
623 ret = nvkm_vmm_new_(func, mmu, 0, managed, addr, size, key, name, pvmm); in gp100_vmm_new_()
632 gp100_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in gp100_vmm_new() argument
636 return gp100_vmm_new_(&gp100_vmm, mmu, managed, addr, size, in gp100_vmm_new()
A Dvmm.c756 if (vmm->managed.raw) { in nvkm_vmm_ptes_unmap_put()
786 if (vmm->managed.raw) { in nvkm_vmm_ptes_get_map()
1087 u32 pd_header, bool managed, u64 addr, u64 size, in nvkm_vmm_ctor() argument
1147 if (managed) { in nvkm_vmm_ctor()
1161 vmm->managed.p.addr = 0; in nvkm_vmm_ctor()
1162 vmm->managed.p.size = addr; in nvkm_vmm_ctor()
1178 vmm->managed.n.addr = addr; in nvkm_vmm_ctor()
1179 vmm->managed.n.size = size; in nvkm_vmm_ctor()
1201 u32 hdr, bool managed, u64 addr, u64 size, in nvkm_vmm_new_() argument
1207 return nvkm_vmm_ctor(func, mmu, hdr, managed, addr, size, key, name, *pvmm); in nvkm_vmm_new_()
[all …]
/drivers/net/mdio/
A Dof_mdio.c394 const char *managed; in of_phy_is_fixed_link() local
403 err = of_property_read_string(np, "managed", &managed); in of_phy_is_fixed_link()
404 if (err == 0 && strcmp(managed, "auto") != 0) in of_phy_is_fixed_link()
420 const char *managed; in of_phy_register_fixed_link() local
422 if (of_property_read_string(np, "managed", &managed) == 0 && in of_phy_register_fixed_link()
423 strcmp(managed, "in-band-status") == 0) { in of_phy_register_fixed_link()
/drivers/net/dsa/
A DKconfig112 tristate "SMSC/Microchip LAN9303 3-ports 10/100 ethernet switch in I2C managed mode"
119 for I2C managed mode.
122 tristate "Microchip LAN9303/LAN9354 3-ports 10/100 ethernet switch in MDIO managed mode"
127 for MDIO managed mode.
145 and VSC7398 SparX integrated ethernet switches in SPI managed mode.
/drivers/gpu/drm/msm/
A Dmsm_gem_vma.c229 if (!vm->managed) in vm_log()
282 if (!vm->managed) in msm_gem_vma_unmap()
291 if (!vm->managed) in msm_gem_vma_unmap()
318 if (!vm->managed) in msm_gem_vma_map()
338 if (!vm->managed) in msm_gem_vma_map()
385 if (vm->managed) { in msm_gem_vma_new()
427 if (vm->managed) in msm_gem_vma_new()
777 if (!managed) { in msm_gem_vm_create()
800 vm->managed = managed; in msm_gem_vm_create()
813 if (!managed) in msm_gem_vm_create()
[all …]
/drivers/net/ethernet/mellanox/mlx5/core/
A DKconfig169 bool "Mellanox Technologies software-managed steering"
174 Build support for software-managed steering in the NIC.
177 bool "Mellanox Technologies hardware-managed steering"
183 written to ICM by HW (as opposed to SW in software-managed steering),
200 port is managed through devlink. A subfunction supports RDMA, netdevice
/drivers/cxl/
A DKconfig29 memory to be mapped into the system address map (Host-managed Device
66 Enable support for host managed device memory (HDM) resources
73 Memory regions to be managed by LIBNVDIMM.
84 managed via a bridge driver from CXL to the LIBNVDIMM system
98 known as HDM "Host-managed Device Memory".
209 range. Otherwise, platform-firmware managed CXL is enabled by being
/drivers/net/dsa/b53/
A DKconfig3 tristate "Broadcom BCM53xx managed switch support"
11 This driver adds support for Broadcom managed switch chips. It supports
/drivers/pmdomain/thead/
A DKconfig11 which can be managed independently. For example GPU, NPU,

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