| /drivers/net/hamradio/ |
| A D | hdlcdrv.c | 159 unsigned int mask1, mask2, mask3, mask4, mask5, mask6, word; in hdlcdrv_receiver() local
177 for(i = 15, mask1 = 0x1fc00, mask2 = 0x1fe00, mask3 = 0x0fc00, in hdlcdrv_receiver()
180 i--, mask1 <<= 1, mask2 <<= 1, mask3 <<= 1, mask4 <<= 1, in hdlcdrv_receiver()
184 else if ((s->hdlcrx.bitstream & mask2) == mask3) { in hdlcdrv_receiver()
255 unsigned int mask1, mask2, mask3; in hdlcdrv_transmitter() local
332 mask3 = 0xffffffff >> (31-s->hdlctx.numbits); in hdlcdrv_transmitter()
335 mask3 = (mask3 << 1) | 1) { in hdlcdrv_transmitter()
340 (s->hdlctx.bitbuf & mask3) | in hdlcdrv_transmitter()
342 (~mask3)) << 1); in hdlcdrv_transmitter()
344 mask3 = (mask3 << 1) | 1; in hdlcdrv_transmitter()
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| /drivers/gpu/drm/amd/display/dc/ |
| A D | dc_helper.c | 298 uint8_t shift3, uint32_t mask3, uint32_t *field_value3) in generic_reg_get3() argument
303 *field_value3 = get_reg_field_value_ex(reg_val, mask3, shift3); in generic_reg_get3()
310 uint8_t shift3, uint32_t mask3, uint32_t *field_value3, in generic_reg_get4() argument
316 *field_value3 = get_reg_field_value_ex(reg_val, mask3, shift3); in generic_reg_get4()
324 uint8_t shift3, uint32_t mask3, uint32_t *field_value3, in generic_reg_get5() argument
331 *field_value3 = get_reg_field_value_ex(reg_val, mask3, shift3); in generic_reg_get5()
340 uint8_t shift3, uint32_t mask3, uint32_t *field_value3, in generic_reg_get6() argument
348 *field_value3 = get_reg_field_value_ex(reg_val, mask3, shift3); in generic_reg_get6()
358 uint8_t shift3, uint32_t mask3, uint32_t *field_value3, in generic_reg_get7() argument
367 *field_value3 = get_reg_field_value_ex(reg_val, mask3, shift3); in generic_reg_get7()
[all …]
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| /drivers/media/test-drivers/vidtv/ |
| A D | vidtv_pes.c | 91 u64 mask3; in vidtv_pes_write_pts_dts() local
98 mask3 = GENMASK_ULL(14, 0); in vidtv_pes_write_pts_dts()
104 pts_dts.pts3 = cpu_to_be16(((args->pts & mask3) << 1) | 0x1); in vidtv_pes_write_pts_dts()
108 pts_dts.dts3 = cpu_to_be16(((args->dts & mask3) << 1) | 0x1); in vidtv_pes_write_pts_dts()
116 pts.pts3 = cpu_to_be16(((args->pts & mask3) << 1) | 0x1); in vidtv_pes_write_pts_dts()
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| /drivers/gpu/drm/amd/display/dc/inc/ |
| A D | reg_helper.h | 401 uint8_t shift3, uint32_t mask3, uint32_t *field_value3);
406 uint8_t shift3, uint32_t mask3, uint32_t *field_value3,
412 uint8_t shift3, uint32_t mask3, uint32_t *field_value3,
419 uint8_t shift3, uint32_t mask3, uint32_t *field_value3,
427 uint8_t shift3, uint32_t mask3, uint32_t *field_value3,
436 uint8_t shift3, uint32_t mask3, uint32_t *field_value3,
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| /drivers/net/ethernet/broadcom/asp2/ |
| A D | bcmasp.c | 880 u64 addr1, addr2, mask1, mask2, mask3; in bcmasp_combine_set_filter() local
889 mask3 = mask1 & mask2; in bcmasp_combine_set_filter()
890 if (mask3 == mask1 && ((addr1 & mask1) == (addr2 & mask1))) { in bcmasp_combine_set_filter()
893 } else if (mask3 == mask2 && ((addr1 & mask2) == (addr2 & mask2))) { in bcmasp_combine_set_filter()
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| /drivers/clk/bcm/ |
| A D | clk-bcm2835.c | 444 u32 mask3; member
454 .mask3 = A2W_PLL_KA_MASK,
464 .mask3 = 0,
716 ana[3] &= ~data->ana->mask3; in bcm2835_pll_set_rate()
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| /drivers/power/supply/ |
| A D | rt9455_charger.c | 1061 unsigned int irq3, mask3; in rt9455_irq_handler_check_irq3_register() local
1072 ret = regmap_read(info->regmap, RT9455_REG_MASK3, &mask3); in rt9455_irq_handler_check_irq3_register()
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