Searched refs:master_ctl (Results 1 – 10 of 10) sorted by relevance
| /drivers/gpu/drm/i915/ |
| A D | i915_irq.c | 338 u32 master_ctl, iir; in cherryview_irq_handler() local
347 if (master_ctl == 0 && iir == 0) in cherryview_irq_handler()
513 u32 master_ctl; in gen8_irq_handler() local
519 if (!master_ctl) { in gen8_irq_handler()
528 if (master_ctl & ~GEN8_GT_IRQS) { in gen8_irq_handler()
565 u32 master_ctl; in gen11_irq_handler() local
572 if (!master_ctl) { in gen11_irq_handler()
578 gen11_gt_irq_handler(gt, master_ctl); in gen11_irq_handler()
581 if (master_ctl & GEN11_DISPLAY_IRQ) in gen11_irq_handler()
623 u32 master_tile_ctl, master_ctl; in dg1_irq_handler() local
[all …]
|
| /drivers/gpu/drm/xe/ |
| A D | xe_irq.c | 117 if (!(master_ctl & GU_MISC_IRQ)) in gu_misc_irq_ack()
308 u32 master_ctl, unsigned long *intr_dw, in gt_irq_handler() argument
321 if (!(master_ctl & GT_DW_IRQ(bank))) in gt_irq_handler()
371 u32 master_ctl, gu_misc_iir; in xelp_irq_handler() local
378 master_ctl = xelp_intr_disable(xe); in xelp_irq_handler()
379 if (!master_ctl) { in xelp_irq_handler()
386 xe_display_irq_handler(xe, master_ctl); in xelp_irq_handler()
462 if (master_ctl == REG_GENMASK(31, 0)) { in dg1_irq_handler()
479 xe_heci_csc_irq_handler(xe, master_ctl); in dg1_irq_handler()
480 xe_display_irq_handler(xe, master_ctl); in dg1_irq_handler()
[all …]
|
| A D | xe_i2c.h | 52 void xe_i2c_irq_handler(struct xe_device *xe, u32 master_ctl);
57 static inline void xe_i2c_irq_handler(struct xe_device *xe, u32 master_ctl) { } in xe_i2c_irq_handler() argument
|
| A D | xe_i2c.c | 157 void xe_i2c_irq_handler(struct xe_device *xe, u32 master_ctl) in xe_i2c_irq_handler() argument
162 if (master_ctl & I2C_IRQ) in xe_i2c_irq_handler()
|
| /drivers/gpu/drm/i915/gt/ |
| A D | intel_gt_irq.c | 169 void gen11_gt_irq_handler(struct intel_gt *gt, const u32 master_ctl) in gen11_gt_irq_handler() argument
176 if (master_ctl & GEN11_GT_DW_IRQ(bank)) in gen11_gt_irq_handler()
405 void gen8_gt_irq_handler(struct intel_gt *gt, u32 master_ctl) in gen8_gt_irq_handler() argument
410 if (master_ctl & (GEN8_GT_RCS_IRQ | GEN8_GT_BCS_IRQ)) { in gen8_gt_irq_handler()
421 if (master_ctl & (GEN8_GT_VCS0_IRQ | GEN8_GT_VCS1_IRQ)) { in gen8_gt_irq_handler()
432 if (master_ctl & GEN8_GT_VECS_IRQ) { in gen8_gt_irq_handler()
441 if (master_ctl & (GEN8_GT_PM_IRQ | GEN8_GT_GUC_IRQ)) { in gen8_gt_irq_handler()
|
| A D | intel_gt_irq.h | 25 void gen11_gt_irq_handler(struct intel_gt *gt, const u32 master_ctl);
40 void gen8_gt_irq_handler(struct intel_gt *gt, u32 master_ctl);
|
| /drivers/gpu/drm/xe/display/ |
| A D | xe_display.h | 26 void xe_display_irq_handler(struct xe_device *xe, u32 master_ctl);
55 static inline void xe_display_irq_handler(struct xe_device *xe, u32 master_ctl) {} in xe_display_irq_handler() argument
|
| A D | xe_display.c | 200 void xe_display_irq_handler(struct xe_device *xe, u32 master_ctl) in xe_display_irq_handler() argument
207 if (master_ctl & DISPLAY_IRQ) in xe_display_irq_handler()
|
| /drivers/gpu/drm/i915/display/ |
| A D | intel_display_irq.h | 52 void gen8_de_irq_handler(struct intel_display *display, u32 master_ctl);
55 u32 gen11_gu_misc_irq_ack(struct intel_display *display, const u32 master_ctl);
|
| A D | intel_display_irq.c | 1341 void gen8_de_irq_handler(struct intel_display *display, u32 master_ctl) in gen8_de_irq_handler() argument
1348 if (master_ctl & GEN8_DE_MISC_IRQ) { in gen8_de_irq_handler()
1359 if (DISPLAY_VER(display) >= 11 && (master_ctl & GEN11_DE_HPD_IRQ)) { in gen8_de_irq_handler()
1370 if (master_ctl & GEN8_DE_PORT_IRQ) { in gen8_de_irq_handler()
1425 if (!(master_ctl & GEN8_DE_PIPE_IRQ(pipe))) in gen8_de_irq_handler()
1472 master_ctl & GEN8_DE_PCH_IRQ) { in gen8_de_irq_handler()
1502 u32 gen11_gu_misc_irq_ack(struct intel_display *display, const u32 master_ctl) in gen11_gu_misc_irq_ack() argument
1506 if (!(master_ctl & GEN11_GU_MISC_IRQ)) in gen11_gu_misc_irq_ack()
|
Completed in 22 milliseconds