| /drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/ |
| A D | ia_css_csc.host.c | 33 to->m00 = (int16_t)from->matrix[0]; in ia_css_encode_cc() 34 to->m01 = (int16_t)from->matrix[1]; in ia_css_encode_cc() 35 to->m02 = (int16_t)from->matrix[2]; in ia_css_encode_cc() 36 to->m10 = (int16_t)from->matrix[3]; in ia_css_encode_cc() 37 to->m11 = (int16_t)from->matrix[4]; in ia_css_encode_cc() 38 to->m12 = (int16_t)from->matrix[5]; in ia_css_encode_cc() 113 config->matrix[0], in ia_css_cc_config_debug_dtrace() 114 config->matrix[1], config->matrix[2], in ia_css_cc_config_debug_dtrace() 115 config->matrix[3], config->matrix[4], in ia_css_cc_config_debug_dtrace() 116 config->matrix[5], config->matrix[6], in ia_css_cc_config_debug_dtrace() [all …]
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| A D | ia_css_csc_types.h | 65 s32 matrix[3 * 3]; /** Conversion matrix. member
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| /drivers/gpu/drm/vkms/ |
| A D | vkms_formats.c | 273 fp_r = drm_fixp_mul(matrix->matrix[0][0], fp_y) + in argb_u16_from_yuv888() 275 drm_fixp_mul(matrix->matrix[0][2], fp_channel_2); in argb_u16_from_yuv888() 276 fp_g = drm_fixp_mul(matrix->matrix[1][0], fp_y) + in argb_u16_from_yuv888() 278 drm_fixp_mul(matrix->matrix[1][2], fp_channel_2); in argb_u16_from_yuv888() 279 fp_b = drm_fixp_mul(matrix->matrix[2][0], fp_y) + in argb_u16_from_yuv888() 281 drm_fixp_mul(matrix->matrix[2][2], fp_channel_2); in argb_u16_from_yuv888() 772 .matrix = { 781 .matrix = { 866 swap(matrix->matrix[0][2], matrix->matrix[0][1]); in swap_uv_columns() 867 swap(matrix->matrix[1][2], matrix->matrix[1][1]); in swap_uv_columns() [all …]
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| A D | vkms_formats.h | 14 struct conversion_matrix *matrix); 18 const struct conversion_matrix *matrix);
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| /drivers/s390/crypto/ |
| A D | vfio_ap_ops.c | 646 struct ap_matrix *matrix) in vfio_ap_matrix_init() argument 980 matrix_mdev->matrix.aqm)) in vfio_ap_mdev_validate_masks() 984 matrix_mdev->matrix.apm, in vfio_ap_mdev_validate_masks() 985 matrix_mdev->matrix.aqm); in vfio_ap_mdev_validate_masks() 1483 if (id > matrix_mdev->matrix.adm_max) { in assign_control_domain_store() 1620 static DEVICE_ATTR_RO(matrix); 1677 if (bit > matrix_mdev->matrix.apm_max) in ap_matrix_overflow_check() 1682 if (bit > matrix_mdev->matrix.aqm_max) in ap_matrix_overflow_check() 2613 matrix_mdev->matrix.apm, in vfio_ap_mdev_cfg_remove() 2616 matrix_mdev->matrix.aqm, in vfio_ap_mdev_cfg_remove() [all …]
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| /drivers/of/ |
| A D | of_numa.c | 77 const __be32 *matrix; in of_numa_parse_distance_map_v1() local 83 matrix = of_get_property(map, "distance-matrix", NULL); in of_numa_parse_distance_map_v1() 84 if (!matrix) { in of_numa_parse_distance_map_v1() 98 nodea = of_read_number(matrix, 1); in of_numa_parse_distance_map_v1() 99 matrix++; in of_numa_parse_distance_map_v1() 100 nodeb = of_read_number(matrix, 1); in of_numa_parse_distance_map_v1() 101 matrix++; in of_numa_parse_distance_map_v1() 102 distance = of_read_number(matrix, 1); in of_numa_parse_distance_map_v1() 103 matrix++; in of_numa_parse_distance_map_v1()
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| /drivers/media/platform/amphion/ |
| A D | vpu_color.c | 89 u32 vpu_color_cvrt_matrix_v2i(u32 matrix) in vpu_color_cvrt_matrix_v2i() argument 91 return vpu_helper_find_in_array_u8(colormatrixcoefs, ARRAY_SIZE(colormatrixcoefs), matrix); in vpu_color_cvrt_matrix_v2i() 94 u32 vpu_color_cvrt_matrix_i2v(u32 matrix) in vpu_color_cvrt_matrix_i2v() argument 96 return matrix < ARRAY_SIZE(colormatrixcoefs) ? colormatrixcoefs[matrix] : 0; in vpu_color_cvrt_matrix_i2v()
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| A D | vpu_helpers.h | 63 u32 vpu_color_cvrt_matrix_v2i(u32 matrix); 64 u32 vpu_color_cvrt_matrix_i2v(u32 matrix);
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| /drivers/media/i2c/ |
| A D | ov7670.c | 1279 int matrix[CMATRIX_LEN]) in ov7670_store_cmatrix() 1294 if (matrix[i] < 0) { in ov7670_store_cmatrix() 1296 if (matrix[i] < -255) in ov7670_store_cmatrix() 1301 if (matrix[i] > 255) in ov7670_store_cmatrix() 1381 matrix[0] = (matrix[3]*sinth + matrix[0]*costh)/1000; in ov7670_calc_cmatrix() 1382 matrix[1] = (matrix[4]*sinth + matrix[1]*costh)/1000; in ov7670_calc_cmatrix() 1383 matrix[2] = (matrix[5]*sinth + matrix[2]*costh)/1000; in ov7670_calc_cmatrix() 1384 matrix[3] = (matrix[3]*costh - matrix[0]*sinth)/1000; in ov7670_calc_cmatrix() 1385 matrix[4] = (matrix[4]*costh - matrix[1]*sinth)/1000; in ov7670_calc_cmatrix() 1386 matrix[5] = (matrix[5]*costh - matrix[2]*sinth)/1000; in ov7670_calc_cmatrix() [all …]
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| A D | msp3400-kthreads.c | 885 int source, matrix; in msp34xxg_set_source() local 890 matrix = 0x30; in msp34xxg_set_source() 894 matrix = 0x10; in msp34xxg_set_source() 898 matrix = 0x20; in msp34xxg_set_source() 902 matrix = 0x00; in msp34xxg_set_source() 907 matrix = 0x20; in msp34xxg_set_source() 916 source = ((in + 1) << 8) | matrix; in msp34xxg_set_source() 918 source = (in << 8) | matrix; in msp34xxg_set_source()
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| /drivers/media/platform/amlogic/c3/isp/ |
| A D | c3-isp-params.c | 417 ISP_CCM_MTX_00_01_MTX_00(ccm->matrix[0][0])); in c3_isp_params_cfg_ccm() 420 ISP_CCM_MTX_00_01_MTX_01(ccm->matrix[0][1])); in c3_isp_params_cfg_ccm() 423 ISP_CCM_MTX_02_03_MTX_02(ccm->matrix[0][2])); in c3_isp_params_cfg_ccm() 427 ISP_CCM_MTX_10_11_MTX_10(ccm->matrix[1][0])); in c3_isp_params_cfg_ccm() 430 ISP_CCM_MTX_10_11_MTX_11(ccm->matrix[1][1])); in c3_isp_params_cfg_ccm() 433 ISP_CCM_MTX_12_13_MTX_12(ccm->matrix[1][2])); in c3_isp_params_cfg_ccm() 437 ISP_CCM_MTX_20_21_MTX_20(ccm->matrix[2][0])); in c3_isp_params_cfg_ccm() 440 ISP_CCM_MTX_20_21_MTX_21(ccm->matrix[2][1])); in c3_isp_params_cfg_ccm() 466 ISP_CM0_COEF00_01_MTX_00(csc->matrix[0][0])); in c3_isp_params_cfg_csc() 469 ISP_CM0_COEF00_01_MTX_01(csc->matrix[0][1])); in c3_isp_params_cfg_csc() [all …]
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| /drivers/staging/media/atomisp/pci/ |
| A D | atomisp_tables.h | 17 .matrix = {141, 18, 68, -40, -5, -19, 35, 4, 16}, 23 .matrix = {255, 29, 120, 0, 374, 342, 0, 672, -301}, 29 .matrix = {255, 29, 120, 0, 0, 0, 0, 0, 0},
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| /drivers/gpu/drm/amd/display/dc/basics/ |
| A D | conversion.c | 80 uint16_t *matrix, in convert_float_matrix() argument 100 matrix[i] = (uint16_t)reg_value; in convert_float_matrix() 130 void convert_hw_matrix(struct fixed31_32 *matrix, in convert_hw_matrix() argument 135 matrix[i] = int_frac_to_fixed_point(reg[i], 2, 13); in convert_hw_matrix()
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| A D | conversion.h | 37 uint16_t *matrix, 44 void convert_hw_matrix(struct fixed31_32 *matrix,
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| /drivers/staging/media/sunxi/cedrus/ |
| A D | cedrus_mpeg2.c | 59 const u8 *matrix; in cedrus_mpeg2_setup() local 72 matrix = quantisation->intra_quantiser_matrix; in cedrus_mpeg2_setup() 74 reg = VE_DEC_MPEG_IQMINPUT_WEIGHT(i, matrix[i]); in cedrus_mpeg2_setup() 81 matrix = quantisation->non_intra_quantiser_matrix; in cedrus_mpeg2_setup() 83 reg = VE_DEC_MPEG_IQMINPUT_WEIGHT(i, matrix[i]); in cedrus_mpeg2_setup()
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| /drivers/gpu/drm/vkms/tests/ |
| A D | vkms_format_test.c | 234 struct conversion_matrix matrix; in vkms_format_test_yuv_u8_to_argb_u16() local 237 (DRM_FORMAT_NV12, param->encoding, param->range, &matrix); in vkms_format_test_yuv_u8_to_argb_u16() 239 argb = argb_u16_from_yuv888(color->yuv.y, color->yuv.u, color->yuv.v, &matrix); in vkms_format_test_yuv_u8_to_argb_u16()
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| /drivers/gpu/drm/vc4/ |
| A D | vc4_kms.c | 145 VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[0]), in vc4_ctm_commit() 147 VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[3]), in vc4_ctm_commit() 149 VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[6]), in vc4_ctm_commit() 152 VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[1]), in vc4_ctm_commit() 154 VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[4]), in vc4_ctm_commit() 156 VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[7]), in vc4_ctm_commit() 159 VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[2]), in vc4_ctm_commit() 161 VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[5]), in vc4_ctm_commit() 163 VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[8]), in vc4_ctm_commit() 630 for (i = 0; i < ARRAY_SIZE(ctm->matrix); i++) { in vc4_ctm_atomic_check() [all …]
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| /drivers/gpu/drm/nouveau/dispnv50/ |
| A D | base907c.c | 144 u32 *val = &asyw->csc.matrix[j * 4 + i]; in base907c_csc() 150 *val = csc_drm_to_base(ctm->matrix[j * 3 + i]); in base907c_csc() 181 NVVAL(NV907C, SET_CSC_RED2RED, COEFF, asyw->csc.matrix[0]), in base907c_csc_set() 183 SET_CSC_GRN2RED, &asyw->csc.matrix[1], 11); in base907c_csc_set()
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| /drivers/gpu/drm/msm/disp/mdp5/ |
| A D | mdp5_plane.c | 498 uint32_t *matrix; in csc_enable() local 510 matrix = csc->matrix; in csc_enable() 512 MDP5_PIPE_CSC_1_MATRIX_COEFF_0_COEFF_11(matrix[0]) | in csc_enable() 513 MDP5_PIPE_CSC_1_MATRIX_COEFF_0_COEFF_12(matrix[1])); in csc_enable() 515 MDP5_PIPE_CSC_1_MATRIX_COEFF_1_COEFF_13(matrix[2]) | in csc_enable() 516 MDP5_PIPE_CSC_1_MATRIX_COEFF_1_COEFF_21(matrix[3])); in csc_enable() 518 MDP5_PIPE_CSC_1_MATRIX_COEFF_2_COEFF_22(matrix[4]) | in csc_enable() 519 MDP5_PIPE_CSC_1_MATRIX_COEFF_2_COEFF_23(matrix[5])); in csc_enable() 521 MDP5_PIPE_CSC_1_MATRIX_COEFF_3_COEFF_31(matrix[6]) | in csc_enable() 522 MDP5_PIPE_CSC_1_MATRIX_COEFF_3_COEFF_32(matrix[7])); in csc_enable() [all …]
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| /drivers/gpu/drm/omapdrm/ |
| A D | omap_crtc.c | 384 cpr->rr = omap_crtc_s31_32_to_s2_8(ctm->matrix[0]); in omap_crtc_cpr_coefs_from_ctm() 385 cpr->rg = omap_crtc_s31_32_to_s2_8(ctm->matrix[1]); in omap_crtc_cpr_coefs_from_ctm() 386 cpr->rb = omap_crtc_s31_32_to_s2_8(ctm->matrix[2]); in omap_crtc_cpr_coefs_from_ctm() 387 cpr->gr = omap_crtc_s31_32_to_s2_8(ctm->matrix[3]); in omap_crtc_cpr_coefs_from_ctm() 388 cpr->gg = omap_crtc_s31_32_to_s2_8(ctm->matrix[4]); in omap_crtc_cpr_coefs_from_ctm() 389 cpr->gb = omap_crtc_s31_32_to_s2_8(ctm->matrix[5]); in omap_crtc_cpr_coefs_from_ctm() 390 cpr->br = omap_crtc_s31_32_to_s2_8(ctm->matrix[6]); in omap_crtc_cpr_coefs_from_ctm() 391 cpr->bg = omap_crtc_s31_32_to_s2_8(ctm->matrix[7]); in omap_crtc_cpr_coefs_from_ctm() 392 cpr->bb = omap_crtc_s31_32_to_s2_8(ctm->matrix[8]); in omap_crtc_cpr_coefs_from_ctm()
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| /drivers/irqchip/ |
| A D | irq-riscv-imsic-state.c | 433 irq_matrix_debug_show(m, imsic->matrix, ind); in imsic_vector_debug_show_summary() 456 local_id = irq_matrix_alloc(imsic->matrix, mask, false, &cpu); in imsic_vector_alloc() 477 irq_matrix_free(imsic->matrix, vec->cpu, vec->local_id, false); in imsic_vector_free() 551 irq_matrix_online(imsic->matrix); in imsic_state_online() 560 irq_matrix_offline(imsic->matrix); in imsic_state_offline() 577 imsic->matrix = irq_alloc_matrix(global->nr_ids + 1, in imsic_matrix_init() 579 if (!imsic->matrix) in imsic_matrix_init() 583 irq_matrix_assign_system(imsic->matrix, 0, false); in imsic_matrix_init() 587 irq_matrix_assign_system(imsic->matrix, IMSIC_IPI_ID, false); in imsic_matrix_init()
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| /drivers/gpu/drm/amd/display/amdgpu_dm/ |
| A D | amdgpu_dm_color.c | 425 struct fixed31_32 *matrix) in __drm_ctm_to_dc_matrix() argument 440 matrix[i] = dc_fixpt_zero; in __drm_ctm_to_dc_matrix() 445 matrix[i] = amdgpu_dm_fixpt_from_s3132(ctm->matrix[i - (i / 4)]); in __drm_ctm_to_dc_matrix() 457 struct fixed31_32 *matrix) in __drm_ctm_3x4_to_dc_matrix() argument 467 matrix[i] = amdgpu_dm_fixpt_from_s3132(ctm->matrix[i]); in __drm_ctm_3x4_to_dc_matrix() 998 __drm_ctm_to_dc_matrix(ctm, stream->gamut_remap_matrix.matrix); in amdgpu_dm_update_crtc_color_mgmt() 1276 __drm_ctm_3x4_to_dc_matrix(ctm, dc_plane_state->gamut_remap_matrix.matrix); in amdgpu_dm_update_plane_color_mgmt()
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| /drivers/gpu/drm/msm/disp/dpu1/ |
| A D | dpu_hw_pingpong.c | 69 data = (cfg->matrix[i] & REG_MASK(4)) | in dpu_hw_pp_setup_dither() 70 ((cfg->matrix[i + 1] & REG_MASK(4)) << 4) | in dpu_hw_pp_setup_dither() 71 ((cfg->matrix[i + 2] & REG_MASK(4)) << 8) | in dpu_hw_pp_setup_dither() 72 ((cfg->matrix[i + 3] & REG_MASK(4)) << 12); in dpu_hw_pp_setup_dither()
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| /drivers/media/platform/ti/omap3isp/ |
| A D | isppreview.c | 365 val = (rgbrgb->matrix[0][0] & 0xfff) << ISPPRV_RGB_MAT1_MTX_RR_SHIFT; in preview_config_rgb_blending() 369 val = (rgbrgb->matrix[0][2] & 0xfff) << ISPPRV_RGB_MAT2_MTX_BR_SHIFT; in preview_config_rgb_blending() 403 val = (csc->matrix[0][0] & 0x3ff) << ISPPRV_CSC0_RY_SHIFT; in preview_config_csc() 404 val |= (csc->matrix[0][1] & 0x3ff) << ISPPRV_CSC0_GY_SHIFT; in preview_config_csc() 405 val |= (csc->matrix[0][2] & 0x3ff) << ISPPRV_CSC0_BY_SHIFT; in preview_config_csc() 408 val = (csc->matrix[1][0] & 0x3ff) << ISPPRV_CSC1_RCB_SHIFT; in preview_config_csc() 409 val |= (csc->matrix[1][1] & 0x3ff) << ISPPRV_CSC1_GCB_SHIFT; in preview_config_csc() 410 val |= (csc->matrix[1][2] & 0x3ff) << ISPPRV_CSC1_BCB_SHIFT; in preview_config_csc() 413 val = (csc->matrix[2][0] & 0x3ff) << ISPPRV_CSC2_RCR_SHIFT; in preview_config_csc() 414 val |= (csc->matrix[2][1] & 0x3ff) << ISPPRV_CSC2_GCR_SHIFT; in preview_config_csc() [all …]
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| /drivers/gpu/drm/tidss/ |
| A D | tidss_dispc.c | 2643 cpr->m[CSC_RR] = dispc_S31_32_to_s2_8(ctm->matrix[0]); in dispc_k2g_cpr_from_ctm() 2644 cpr->m[CSC_RG] = dispc_S31_32_to_s2_8(ctm->matrix[1]); in dispc_k2g_cpr_from_ctm() 2645 cpr->m[CSC_RB] = dispc_S31_32_to_s2_8(ctm->matrix[2]); in dispc_k2g_cpr_from_ctm() 2646 cpr->m[CSC_GR] = dispc_S31_32_to_s2_8(ctm->matrix[3]); in dispc_k2g_cpr_from_ctm() 2647 cpr->m[CSC_GG] = dispc_S31_32_to_s2_8(ctm->matrix[4]); in dispc_k2g_cpr_from_ctm() 2648 cpr->m[CSC_GB] = dispc_S31_32_to_s2_8(ctm->matrix[5]); in dispc_k2g_cpr_from_ctm() 2649 cpr->m[CSC_BR] = dispc_S31_32_to_s2_8(ctm->matrix[6]); in dispc_k2g_cpr_from_ctm() 2650 cpr->m[CSC_BG] = dispc_S31_32_to_s2_8(ctm->matrix[7]); in dispc_k2g_cpr_from_ctm() 2651 cpr->m[CSC_BB] = dispc_S31_32_to_s2_8(ctm->matrix[8]); in dispc_k2g_cpr_from_ctm() 2721 cpr->m[CSC_RR] = dispc_S31_32_to_s3_8(ctm->matrix[0]); in dispc_csc_from_ctm() [all …]
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