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Searched refs:max_allow_delay_us (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/
A Ddml2_pmo_dcn4_fams2.c1343 group_fams2_meta->disallow_time_us < pmo->ip_caps->fams2.max_allow_delay_us; in is_timing_group_schedulable()
1355 double max_allow_delay_us = 0.0; in is_config_schedulable() local
1377 max_allow_delay_us += s->pmo_dcn4.group_common_fams2_meta[i].disallow_time_us; in is_config_schedulable()
1441 if (schedulable && max_allow_delay_us < pmo->ip_caps->fams2.max_allow_delay_us) { in is_config_schedulable()
1480 if (schedulable && max_allow_delay_us < pmo->ip_caps->fams2.max_allow_delay_us) { in is_config_schedulable()
1503 …max_allow_delay_us = max_shift_us / shift_per_period * s->pmo_dcn4.group_common_fams2_meta[lrg_idx… in is_config_schedulable()
1507 max_allow_delay_us < pmo->ip_caps->fams2.max_allow_delay_us) { in is_config_schedulable()
/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/
A Ddml_top_soc_parameter_types.h192 unsigned int max_allow_delay_us; member
/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/bounding_boxes/
A Ddcn4_soc_bb.h357 .max_allow_delay_us = 100 * 1000,
/drivers/gpu/drm/amd/display/dmub/inc/
A Ddmub_cmd.h2327 uint32_t max_allow_delay_us; // max delay to assert allow from uclk change begin member
/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
A Ddml2_core_dcn4_calcs.c12676 …arb_param->pstate_stall_threshold = (unsigned int)(mode_lib->ip_caps.fams2.max_allow_delay_us * re… in rq_dlg_get_arb_params()
12731 fams2_global_config->max_allow_delay_us = mode_lib->ip_caps.fams2.max_allow_delay_us; in dml2_core_calcs_get_global_fams2_programming()

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