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Searched refs:max_backends_per_se (Results 1 – 21 of 21) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_atomfirmware.c837 adev->gfx.config.max_backends_per_se = gfx_info->v24.max_backends_per_se; in amdgpu_atomfirmware_get_gfx_info()
855 adev->gfx.config.max_backends_per_se = gfx_info->v27.max_backends_per_se; in amdgpu_atomfirmware_get_gfx_info()
876 adev->gfx.config.max_backends_per_se = gfx_info->v30.max_backends_per_se; in amdgpu_atomfirmware_get_gfx_info()
A Dgfx_v6_0.c1338 mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se/ in gfx_v6_0_get_rb_active_bitmap()
1472 u32 rb_bitmap_width_per_sh = adev->gfx.config.max_backends_per_se / in gfx_v6_0_setup_rb()
1491 num_rb_pipes = min_t(unsigned, adev->gfx.config.max_backends_per_se * in gfx_v6_0_setup_rb()
1593 adev->gfx.config.max_backends_per_se = 4; in gfx_v6_0_constants_init()
1610 adev->gfx.config.max_backends_per_se = 4; in gfx_v6_0_constants_init()
1627 adev->gfx.config.max_backends_per_se = 4; in gfx_v6_0_constants_init()
1644 adev->gfx.config.max_backends_per_se = 2; in gfx_v6_0_constants_init()
1661 adev->gfx.config.max_backends_per_se = 1; in gfx_v6_0_constants_init()
A Dgfx_v7_0.c1602 mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se / in gfx_v7_0_get_rb_active_bitmap()
1762 u32 rb_bitmap_width_per_sh = adev->gfx.config.max_backends_per_se / in gfx_v7_0_setup_rb()
1780 num_rb_pipes = min_t(unsigned, adev->gfx.config.max_backends_per_se * in gfx_v7_0_setup_rb()
4147 adev->gfx.config.max_backends_per_se = 2; in gfx_v7_0_gpu_early_init()
4164 adev->gfx.config.max_backends_per_se = 4; in gfx_v7_0_gpu_early_init()
4180 adev->gfx.config.max_backends_per_se = 2; in gfx_v7_0_gpu_early_init()
4200 adev->gfx.config.max_backends_per_se = 1; in gfx_v7_0_gpu_early_init()
A Damdgpu_gfx.h231 unsigned max_backends_per_se; member
A Dgfx_v8_0.c1653 adev->gfx.config.max_backends_per_se = 2; in gfx_v8_0_gpu_early_init()
1670 adev->gfx.config.max_backends_per_se = 4; in gfx_v8_0_gpu_early_init()
1717 adev->gfx.config.max_backends_per_se = 2; in gfx_v8_0_gpu_early_init()
1733 adev->gfx.config.max_backends_per_se = 2; in gfx_v8_0_gpu_early_init()
1750 adev->gfx.config.max_backends_per_se = 1; in gfx_v8_0_gpu_early_init()
1768 adev->gfx.config.max_backends_per_se = 2; in gfx_v8_0_gpu_early_init()
3422 mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se / in gfx_v8_0_get_rb_active_bitmap()
3584 u32 rb_bitmap_width_per_sh = adev->gfx.config.max_backends_per_se / in gfx_v8_0_setup_rb()
3602 num_rb_pipes = min_t(unsigned, adev->gfx.config.max_backends_per_se * in gfx_v8_0_setup_rb()
A Damdgpu_atombios.c749 adev->gfx.config.max_backends_per_se = gfx_info->info.max_backends_per_se; in amdgpu_atombios_get_gfx_info()
A Damdgpu_discovery.c1599 adev->gfx.config.max_backends_per_se = le32_to_cpu(gc_info->v1.gc_num_rb_per_se); in amdgpu_discovery_get_gfx_info()
1643 adev->gfx.config.max_backends_per_se = le32_to_cpu(gc_info->v2.gc_num_rb_per_se); in amdgpu_discovery_get_gfx_info()
A Damdgpu_debugfs.c899 config[no_regs++] = adev->gfx.config.max_backends_per_se; in amdgpu_debugfs_gca_config_read()
A Damdgpu_kms.c929 dev_info->num_rb_pipes = adev->gfx.config.max_backends_per_se * in amdgpu_info_ioctl()
A Dgfx_v12_0.c1720 rb_mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se * in gfx_v12_0_get_rb_active_bitmap()
1744 rb_bitmap_width_per_sa = adev->gfx.config.max_backends_per_se / in gfx_v12_0_setup_rb()
A Dgfx_v11_0.c1989 rb_mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se * in gfx_v11_0_get_rb_active_bitmap()
2013 rb_bitmap_width_per_sa = adev->gfx.config.max_backends_per_se / in gfx_v11_0_setup_rb()
A Dgfx_v9_0.c2532 mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se / in gfx_v9_0_get_rb_active_bitmap()
2543 u32 rb_bitmap_width_per_sh = adev->gfx.config.max_backends_per_se / in gfx_v9_0_setup_rb()
A Damdgpu_device.c2629 adev->gfx.config.max_backends_per_se = le32_to_cpu(gpu_info_fw->gc_num_rb_per_se); in amdgpu_device_parse_gpu_info_fw()
A Dgfx_v10_0.c5093 mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se / in gfx_v10_0_get_rb_active_bitmap()
5105 u32 rb_bitmap_width_per_sh = adev->gfx.config.max_backends_per_se / in gfx_v10_0_setup_rb()
/drivers/gpu/drm/radeon/
A Dni.c884 rdev->config.cayman.max_backends_per_se = 4; in cayman_gpu_init()
922 rdev->config.cayman.max_backends_per_se = 2; in cayman_gpu_init()
936 rdev->config.cayman.max_backends_per_se = 2; in cayman_gpu_init()
950 rdev->config.cayman.max_backends_per_se = 1; in cayman_gpu_init()
957 rdev->config.cayman.max_backends_per_se = 1; in cayman_gpu_init()
1078 …for (i = 0; i < (rdev->config.cayman.max_backends_per_se * rdev->config.cayman.max_shader_engines)… in cayman_gpu_init()
1082 …for (i = 0; i < (rdev->config.cayman.max_backends_per_se * rdev->config.cayman.max_shader_engines)… in cayman_gpu_init()
1112 if ((rdev->config.cayman.max_backends_per_se == 1) && in cayman_gpu_init()
1124 rdev->config.cayman.max_backends_per_se * in cayman_gpu_init()
A Dradeon_kms.c352 *value = rdev->config.cik.max_backends_per_se * in radeon_info_ioctl()
355 *value = rdev->config.si.max_backends_per_se * in radeon_info_ioctl()
358 *value = rdev->config.cayman.max_backends_per_se * in radeon_info_ioctl()
A Dsi.c3084 rdev->config.si.max_backends_per_se = 4; in si_gpu_init()
3101 rdev->config.si.max_backends_per_se = 4; in si_gpu_init()
3119 rdev->config.si.max_backends_per_se = 4; in si_gpu_init()
3136 rdev->config.si.max_backends_per_se = 2; in si_gpu_init()
3153 rdev->config.si.max_backends_per_se = 1; in si_gpu_init()
3270 rdev->config.si.max_backends_per_se); in si_gpu_init()
A Dradeon.h2085 unsigned max_backends_per_se; member
2124 unsigned max_backends_per_se; member
2155 unsigned max_backends_per_se; member
A Dcik.c2330 u32 num_rbs = rdev->config.cik.max_backends_per_se * in cik_tiling_mode_table_init()
3182 rdev->config.cik.max_backends_per_se = 2; in cik_gpu_init()
3199 rdev->config.cik.max_backends_per_se = 4; in cik_gpu_init()
3215 rdev->config.cik.max_backends_per_se = 2; in cik_gpu_init()
3235 rdev->config.cik.max_backends_per_se = 1; in cik_gpu_init()
3337 rdev->config.cik.max_backends_per_se); in cik_gpu_init()
/drivers/gpu/drm/amd/include/
A Datomfirmware.h1798 uint8_t max_backends_per_se; member
1818 uint8_t max_backends_per_se; member
1843 uint8_t max_backends_per_se; member
1878 uint8_t max_backends_per_se; member
1919 uint8_t max_backends_per_se; member
A Datombios.h5656 UCHAR max_backends_per_se; member
5669 UCHAR max_backends_per_se; member

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