Searched refs:max_clk_data (Results 1 – 3 of 3) sorted by relevance
50 struct max77686_clk_init_data *max_clk_data; member158 return &drv_data->max_clk_data[idx].hw; in of_clk_max77686_get()206 sizeof(*drv_data->max_clk_data), in max77686_clk_probe()208 if (!drv_data->max_clk_data) in max77686_clk_probe()212 struct max77686_clk_init_data *max_clk_data; in max77686_clk_probe() local215 max_clk_data = &drv_data->max_clk_data[i]; in max77686_clk_probe()217 max_clk_data->regmap = regmap; in max77686_clk_probe()218 max_clk_data->clk_info = &hw_clks[i]; in max77686_clk_probe()226 max_clk_data->clk_idata.name = clk_name; in max77686_clk_probe()230 max_clk_data->hw.init = &max_clk_data->clk_idata; in max77686_clk_probe()[all …]
410 if (!max_clk_data.dcfclk_mhz || !max_clk_data.dispclk_mhz || !max_clk_data.dtbclk_mhz) in build_synthetic_soc_states()413 if (max_clk_data.dppclk_mhz == 0) in build_synthetic_soc_states()414 max_clk_data.dppclk_mhz = max_clk_data.dispclk_mhz; in build_synthetic_soc_states()416 if (max_clk_data.fclk_mhz == 0) in build_synthetic_soc_states()417 max_clk_data.fclk_mhz = max_clk_data.dcfclk_mhz * in build_synthetic_soc_states()421 if (max_clk_data.phyclk_mhz == 0) in build_synthetic_soc_states()425 entry.dispclk_mhz = max_clk_data.dispclk_mhz; in build_synthetic_soc_states()427 entry.dppclk_mhz = max_clk_data.dppclk_mhz; in build_synthetic_soc_states()428 entry.dtbclk_mhz = max_clk_data.dtbclk_mhz; in build_synthetic_soc_states()429 entry.phyclk_mhz = max_clk_data.phyclk_mhz; in build_synthetic_soc_states()[all …]
2868 if (!max_clk_data.dcfclk_mhz || !max_clk_data.dispclk_mhz || !max_clk_data.dtbclk_mhz) in build_synthetic_soc_states()2871 if (max_clk_data.dppclk_mhz == 0) in build_synthetic_soc_states()2872 max_clk_data.dppclk_mhz = max_clk_data.dispclk_mhz; in build_synthetic_soc_states()2874 if (max_clk_data.fclk_mhz == 0) in build_synthetic_soc_states()2875 max_clk_data.fclk_mhz = max_clk_data.dcfclk_mhz * in build_synthetic_soc_states()2879 if (max_clk_data.phyclk_mhz == 0) in build_synthetic_soc_states()2883 entry.dispclk_mhz = max_clk_data.dispclk_mhz; in build_synthetic_soc_states()2885 entry.dppclk_mhz = max_clk_data.dppclk_mhz; in build_synthetic_soc_states()2886 entry.dtbclk_mhz = max_clk_data.dtbclk_mhz; in build_synthetic_soc_states()2887 entry.phyclk_mhz = max_clk_data.phyclk_mhz; in build_synthetic_soc_states()[all …]
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