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Searched refs:max_mixer_width (Results 1 – 25 of 32) sorted by relevance

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/drivers/gpu/drm/msm/disp/dpu1/catalog/
A Ddpu_6_5_qcm2290.h11 .max_mixer_width = DEFAULT_DPU_LINE_WIDTH,
A Ddpu_6_3_sm6115.h11 .max_mixer_width = DEFAULT_DPU_LINE_WIDTH,
A Ddpu_6_9_sm6375.h12 .max_mixer_width = DEFAULT_DPU_LINE_WIDTH,
A Ddpu_1_15_msm8917.h10 .max_mixer_width = DEFAULT_DPU_LINE_WIDTH,
A Ddpu_1_14_msm8937.h10 .max_mixer_width = DEFAULT_DPU_LINE_WIDTH,
A Ddpu_1_16_msm8953.h10 .max_mixer_width = DEFAULT_DPU_LINE_WIDTH,
A Ddpu_5_4_sm6125.h12 .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
A Ddpu_6_2_sc7180.h11 .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
A Ddpu_3_3_sdm630.h10 .max_mixer_width = DEFAULT_DPU_LINE_WIDTH,
A Ddpu_6_4_sm6350.h12 .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
A Ddpu_5_3_sm6150.h10 .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
A Ddpu_7_2_sc7280.h11 .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
A Ddpu_3_2_sdm660.h10 .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
A Ddpu_1_7_msm8996.h12 .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
A Ddpu_3_0_msm8998.h11 .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
A Ddpu_5_2_sm7150.h11 .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
A Ddpu_4_0_sdm845.h11 .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
A Ddpu_5_0_sm8150.h11 .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
A Ddpu_6_0_sm8250.h11 .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
A Ddpu_7_0_sm8350.h11 .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
A Ddpu_9_0_sm8550.h11 .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
A Ddpu_9_1_sar2130p.h11 .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
/drivers/gpu/drm/msm/disp/dpu1/
A Ddpu_writeback.c24 return drm_add_modes_noedid(connector, dpu_kms->catalog->caps->max_mixer_width, in dpu_wb_conn_get_modes()
A Ddpu_hw_catalog.h268 u32 max_mixer_width; member
A Ddpu_crtc.c772 adj_mode->hdisplay > dpu_kms->catalog->caps->max_mixer_width) in _dpu_crtc_check_and_setup_lm_bounds()
784 if (drm_rect_width(r) > dpu_kms->catalog->caps->max_mixer_width) in _dpu_crtc_check_and_setup_lm_bounds()
1542 mode->hdisplay > dpu_kms->catalog->caps->max_mixer_width) in dpu_crtc_mode_valid()
1548 2 * dpu_kms->catalog->caps->max_mixer_width, in dpu_crtc_mode_valid()

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