Searched refs:max_pstate (Results 1 – 6 of 6) sorted by relevance
| /drivers/cpufreq/ |
| A D | apple-soc-cpufreq.c | 65 u64 max_pstate; member
82 .max_pstate = 7,
91 .max_pstate = 15,
100 .max_pstate = 31,
109 .max_pstate = 15,
179 if (index > priv->info->max_pstate) in apple_soc_cpufreq_set_target()
180 index = priv->info->max_pstate; in apple_soc_cpufreq_set_target()
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| A D | intel_pstate.c | 141 int max_pstate; member
542 return cpu->pstate.max_pstate; in intel_pstate_freq_to_hwp_rel()
2152 if (pstate > cpudata->pstate.max_pstate) in atom_get_val()
2198 int_tofp(cpudata->pstate.max_pstate - in atom_get_vid()
2258 int max_pstate; in core_get_max_pstate() local
2263 max_pstate = (plat_info >> 8) & 0xFF; in core_get_max_pstate()
2267 return max_pstate; in core_get_max_pstate()
2281 max_pstate = tar_levels; in core_get_max_pstate()
2286 return max_pstate; in core_get_max_pstate()
3339 if (max_pstate < min_pstate) in intel_cpufreq_adjust_perf()
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| /drivers/acpi/ |
| A D | processor_thermal.c | 277 int max_pstate; in processor_set_cur_state() local
286 max_pstate = cpufreq_get_max_state(pr->id); in processor_set_cur_state()
291 if (state <= max_pstate) { in processor_set_cur_state()
296 cpufreq_set_cur_state(pr->id, max_pstate); in processor_set_cur_state()
298 state - max_pstate, false); in processor_set_cur_state()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
| A D | dcn315_clk_mgr.c | 488 uint32_t max_pstate = clock_table->NumDfPstatesEnabled - 1; in dcn315_clk_mgr_helper_populate_bw_params() local
498 max_pstate = j; in dcn315_clk_mgr_helper_populate_bw_params()
502 max_pstate = 0; in dcn315_clk_mgr_helper_populate_bw_params()
513 bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[max_pstate].FClk; in dcn315_clk_mgr_helper_populate_bw_params()
514 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[max_pstate].MemClk; in dcn315_clk_mgr_helper_populate_bw_params()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| A D | dcn314_clk_mgr.c | 623 uint32_t max_pstate = 0, max_fclk = 0, min_pstate = 0, max_dispclk = 0, max_dppclk = 0; in dcn314_clk_mgr_helper_populate_bw_params() local
631 max_pstate = i; in dcn314_clk_mgr_helper_populate_bw_params()
684 if (max_pstate != min_pstate || i == 0) { in dcn314_clk_mgr_helper_populate_bw_params()
689 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[max_pstate].MemClk; in dcn314_clk_mgr_helper_populate_bw_params()
690 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[max_pstate].Voltage; in dcn314_clk_mgr_helper_populate_bw_params()
696 clock_table->DfPstateTable[max_pstate].WckRatio); in dcn314_clk_mgr_helper_populate_bw_params()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| A D | dcn35_clk_mgr.c | 908 uint32_t max_pstate = 0, max_dram_speed_mts = 0, min_dram_speed_mts = 0; in dcn35_clk_mgr_helper_populate_bw_params() local
920 max_pstate = i; in dcn35_clk_mgr_helper_populate_bw_params()
925 min_pstate = max_pstate; in dcn35_clk_mgr_helper_populate_bw_params()
989 if (max_pstate != min_pstate || i == 0) { in dcn35_clk_mgr_helper_populate_bw_params()
994 bw_params->clk_table.entries[i].memclk_mhz = clock_table->MemPstateTable[max_pstate].MemClk; in dcn35_clk_mgr_helper_populate_bw_params()
995 bw_params->clk_table.entries[i].voltage = clock_table->MemPstateTable[max_pstate].Voltage; in dcn35_clk_mgr_helper_populate_bw_params()
1003 clock_table->MemPstateTable[max_pstate].WckRatio); in dcn35_clk_mgr_helper_populate_bw_params()
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