Searched refs:mcache_regs (Results 1 – 8 of 8) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/hubp/dcn401/ |
| A D | dcn401_hubp.c | 655 struct dml2_hubp_pipe_mcache_regs *mcache_regs) in hubp401_program_mcache_id_and_split_coordinate() argument
660 MCACHEID_REG_READ_1H_P0, mcache_regs->main.p0.mcache_id_first, in hubp401_program_mcache_id_and_split_coordinate()
661 MCACHEID_REG_READ_2H_P0, mcache_regs->main.p0.mcache_id_second, in hubp401_program_mcache_id_and_split_coordinate()
662 MCACHEID_REG_READ_1H_P1, mcache_regs->main.p1.mcache_id_first, in hubp401_program_mcache_id_and_split_coordinate()
663 MCACHEID_REG_READ_2H_P1, mcache_regs->main.p1.mcache_id_second, in hubp401_program_mcache_id_and_split_coordinate()
664 MCACHEID_MALL_PREF_1H_P0, mcache_regs->mall.p0.mcache_id_first, in hubp401_program_mcache_id_and_split_coordinate()
665 MCACHEID_MALL_PREF_2H_P0, mcache_regs->mall.p0.mcache_id_second, in hubp401_program_mcache_id_and_split_coordinate()
666 MCACHEID_MALL_PREF_1H_P1, mcache_regs->mall.p1.mcache_id_first, in hubp401_program_mcache_id_and_split_coordinate()
667 MCACHEID_MALL_PREF_2H_P1, mcache_regs->mall.p1.mcache_id_second); in hubp401_program_mcache_id_and_split_coordinate()
670 VIEWPORT_MCACHE_SPLIT_COORDINATE, mcache_regs->main.p0.split_location, in hubp401_program_mcache_id_and_split_coordinate()
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| A D | dcn401_hubp.h | 303 struct dml2_hubp_pipe_mcache_regs *mcache_regs);
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| /drivers/gpu/drm/amd/display/dc/dml2/dml21/ |
| A D | dml21_wrapper.c | 392 memcpy(&dc_main_pipes[dc_pipe_index]->mcache_regs, in dml21_prepare_mcache_programming()
406 memcpy(&dc_phantom_pipes[dc_pipe_index]->mcache_regs, in dml21_prepare_mcache_programming()
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| /drivers/gpu/drm/amd/display/dc/inc/hw/ |
| A D | hubp.h | 273 …mcache_id_and_split_coordinate)(struct hubp *hubp, struct dml2_hubp_pipe_mcache_regs *mcache_regs);
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| /drivers/gpu/drm/amd/display/dc/inc/ |
| A D | core_types.h | 484 struct dml2_hubp_pipe_mcache_regs mcache_regs; member
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| /drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/ |
| A D | dml2_internal_shared_types.h | 771 …struct dml2_display_mcache_regs mcache_regs[DML2_MAX_PLANES][DML2_MAX_DCN_PIPES]; //One set per pi… member
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| /drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc_hw_sequencer.c | 604 uint32_t first_id = pipe_ctx->mcache_regs.main.p0.mcache_id_first; in get_dcc_visual_confirm_color()
605 uint32_t second_id = pipe_ctx->mcache_regs.main.p0.mcache_id_second; in get_dcc_visual_confirm_color()
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| A D | dcn20_hwseq.c | 1790 hubp->funcs->hubp_program_mcache_id_and_split_coordinate(hubp, &pipe_ctx->mcache_regs); in dcn20_update_dchubp_dpp()
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