| /drivers/gpu/drm/msm/disp/dpu1/ |
| A D | dpu_rm.c | 56 rm->has_legacy_ctls = (cat->mdss_ver->core_major_ver < 5); in dpu_rm_init()
63 hw = dpu_hw_lm_init(dev, lm, mmio, cat->mdss_ver); in dpu_rm_init()
90 hw = dpu_hw_pingpong_init(dev, pp, mmio, cat->mdss_ver); in dpu_rm_init()
106 hw = dpu_hw_intf_init(dev, intf, mmio, cat->mdss_ver); in dpu_rm_init()
119 hw = dpu_hw_wb_init(dev, wb, mmio, cat->mdss_ver); in dpu_rm_init()
145 hw = dpu_hw_ctl_init(dev, ctl, mmio, cat->mdss_ver, cat->mixer_count, cat->mixer); in dpu_rm_init()
171 if (cat->mdss_ver->core_major_ver >= 7) in dpu_rm_init()
174 hw = dpu_hw_dsc_init(dev, dsc, mmio, cat->mdss_ver); in dpu_rm_init()
188 hw = dpu_hw_sspp_init(dev, sspp, mmio, mdss_data, cat->mdss_ver); in dpu_rm_init()
200 hw = dpu_hw_cdm_init(dev, cat->cdm, mmio, cat->mdss_ver); in dpu_rm_init()
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| A D | dpu_hw_ctl.c | 562 if (ctx->mdss_ver->core_major_ver >= 9) in dpu_hw_ctl_setup_blendstage()
582 if (ctx->mdss_ver->core_major_ver >= 7) in dpu_hw_ctl_intf_cfg_v1()
798 const struct dpu_mdss_version *mdss_ver, in dpu_hw_ctl_init() argument
812 c->mdss_ver = mdss_ver; in dpu_hw_ctl_init()
814 if (mdss_ver->core_major_ver >= 5) { in dpu_hw_ctl_init()
848 if (mdss_ver->core_major_ver < 12) { in dpu_hw_ctl_init()
857 if (mdss_ver->core_major_ver >= 7) in dpu_hw_ctl_init()
862 if (mdss_ver->core_major_ver >= 7) in dpu_hw_ctl_init()
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| A D | dpu_hw_lm.c | 353 const struct dpu_mdss_version *mdss_ver) in dpu_hw_lm_init() argument
373 if (mdss_ver->core_major_ver >= 12) in dpu_hw_lm_init()
375 else if (mdss_ver->core_major_ver >= 4) in dpu_hw_lm_init()
379 if (mdss_ver->core_major_ver < 12) { in dpu_hw_lm_init()
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| A D | dpu_hw_ctl.h | 316 const struct dpu_mdss_version *mdss_ver; member
335 const struct dpu_mdss_version *mdss_ver,
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| A D | dpu_hw_intf.c | 182 intf->mdss_ver->core_major_ver >= 7) in dpu_hw_intf_setup_timing_engine()
240 if (intf->mdss_ver->core_major_ver >= 5) { in dpu_hw_intf_setup_timing_engine()
312 if (intf->mdss_ver->core_major_ver >= 5) in dpu_hw_intf_get_status()
581 c->mdss_ver = mdss_rev; in dpu_hw_intf_init()
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| A D | dpu_hw_dsc.c | 195 const struct dpu_mdss_version *mdss_ver) in dpu_hw_dsc_init() argument
212 if (mdss_ver->core_major_ver >= 5) in dpu_hw_dsc_init()
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| A D | dpu_hw_dsc.h | 68 const struct dpu_mdss_version *mdss_ver);
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| A D | dpu_hw_lm.h | 117 const struct dpu_mdss_version *mdss_ver);
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| A D | dpu_hw_intf.h | 128 const struct dpu_mdss_version *mdss_ver; member
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| A D | dpu_hw_sspp.h | 317 const struct dpu_mdss_version *mdss_ver; member
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| A D | dpu_encoder_phys_wb.c | 231 if (phys_enc->dpu_kms->catalog->mdss_ver->core_major_ver >= 5 && in dpu_encoder_phys_wb_setup_ctl()
556 if (phys_enc->dpu_kms->catalog->mdss_ver->core_major_ver >= 5) in dpu_encoder_phys_wb_disable()
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| A D | dpu_encoder_phys_cmd.c | 72 if (phys_enc->dpu_kms->catalog->mdss_ver->core_major_ver >= 5 && in _dpu_encoder_phys_cmd_update_intf_cfg()
763 if (phys_enc->dpu_kms->catalog->mdss_ver->core_major_ver >= 5) in dpu_encoder_phys_cmd_init()
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| /drivers/gpu/drm/msm/disp/dpu1/catalog/ |
| A D | dpu_6_5_qcm2290.h | 125 .mdss_ver = &qcm2290_mdss_ver,
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| A D | dpu_6_3_sm6115.h | 132 .mdss_ver = &sm6115_mdss_ver,
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| A D | dpu_6_9_sm6375.h | 141 .mdss_ver = &sm6375_mdss_ver,
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| A D | dpu_4_1_sdm670.h | 129 .mdss_ver = &sdm670_mdss_ver,
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| A D | dpu_1_15_msm8917.h | 163 .mdss_ver = &msm8917_mdss_ver,
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| A D | dpu_1_14_msm8937.h | 184 .mdss_ver = &msm8937_mdss_ver,
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| A D | dpu_1_16_msm8953.h | 191 .mdss_ver = &msm8953_mdss_ver,
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| A D | dpu_5_4_sm6125.h | 202 .mdss_ver = &sm6125_mdss_ver,
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| A D | dpu_6_2_sc7180.h | 196 .mdss_ver = &sc7180_mdss_ver,
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| A D | dpu_3_3_sdm630.h | 199 .mdss_ver = &sdm630_mdss_ver,
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| A D | dpu_6_4_sm6350.h | 212 .mdss_ver = &sm6350_mdss_ver,
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| A D | dpu_5_3_sm6150.h | 231 .mdss_ver = &sm6150_mdss_ver,
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| A D | dpu_7_2_sc7280.h | 236 .mdss_ver = &sc7280_mdss_ver,
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