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Searched refs:mem_clock (Results 1 – 16 of 16) sorted by relevance

/drivers/gpu/drm/amd/pm/powerplay/smumgr/
A Dfiji_smumgr.c1108 if (mem_clock <= 10000) in fiji_get_mclk_frequency_ratio()
1110 if (mem_clock <= 15000) in fiji_get_mclk_frequency_ratio()
1112 if (mem_clock <= 20000) in fiji_get_mclk_frequency_ratio()
1114 if (mem_clock <= 25000) in fiji_get_mclk_frequency_ratio()
1116 if (mem_clock <= 30000) in fiji_get_mclk_frequency_ratio()
1118 if (mem_clock <= 35000) in fiji_get_mclk_frequency_ratio()
1120 if (mem_clock <= 40000) in fiji_get_mclk_frequency_ratio()
1122 if (mem_clock <= 45000) in fiji_get_mclk_frequency_ratio()
1124 if (mem_clock <= 50000) in fiji_get_mclk_frequency_ratio()
1126 if (mem_clock <= 55000) in fiji_get_mclk_frequency_ratio()
[all …]
A Dvegam_smumgr.c1245 int32_t eng_clock, int32_t mem_clock, in vegam_populate_memory_timing_parameters() argument
1257 eng_clock, mem_clock); in vegam_populate_memory_timing_parameters()
A Dpolaris10_smumgr.c1465 int32_t eng_clock, int32_t mem_clock, in polaris10_populate_memory_timing_parameters() argument
1474 eng_clock, mem_clock); in polaris10_populate_memory_timing_parameters()
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
A Dvega10_hwmgr.c1818 uint32_t mem_clock, uint8_t *current_mem_vid, in vega10_populate_single_memory_level() argument
1841 mem_clock = mem_clock > mem_max_clock ? mem_max_clock : mem_clock; in vega10_populate_single_memory_level()
1844 if (dep_on_mclk->entries[i].clk == mem_clock) in vega10_populate_single_memory_level()
3318 vega10_ps->performance_levels[i].mem_clock = in vega10_apply_state_adjust_rules()
3411 vega10_ps->performance_levels[1].mem_clock)) in vega10_apply_state_adjust_rules()
3416 if (vega10_ps->performance_levels[1].mem_clock < in vega10_apply_state_adjust_rules()
3417 vega10_ps->performance_levels[0].mem_clock) in vega10_apply_state_adjust_rules()
3418 vega10_ps->performance_levels[0].mem_clock = in vega10_apply_state_adjust_rules()
3419 vega10_ps->performance_levels[1].mem_clock; in vega10_apply_state_adjust_rules()
3586 vega10_ps->performance_levels[0].mem_clock, in vega10_trim_dpm_states()
[all …]
A Dvega10_hwmgr.h87 uint32_t mem_clock; member
188 uint32_t mem_clock; member
A Dvega20_hwmgr.h104 uint32_t mem_clock; member
219 uint32_t mem_clock; member
A Dvega12_hwmgr.h166 uint32_t mem_clock; member
A Dvega20_hwmgr.c629 dpm_table->dpm_levels[0].value = data->vbios_boot_state.mem_clock / 100; in vega20_setup_memclk_dpm_table()
809 data->vbios_boot_state.mem_clock = boot_up_values.ulUClk; in vega20_init_smc_table()
1620 max_sustainable_clocks->uclock = data->vbios_boot_state.mem_clock / 100; in vega20_init_max_sustainable_clocks()
A Dvega12_hwmgr.c688 dpm_table->dpm_levels[0].value = data->vbios_boot_state.mem_clock / 100; in vega12_setup_default_dpm_tables()
836 data->vbios_boot_state.mem_clock = boot_up_values.ulUClk; in vega12_init_smc_table()
/drivers/staging/sm750fb/
A Dddk750_chip.h70 unsigned short mem_clock; member
A Dddk750_chip.c243 set_memory_clock(MHz(p_init_param->mem_clock)); in ddk750_init_hw()
/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_atombios.h168 u32 eng_clock, u32 mem_clock);
A Damdgpu_atombios.c1169 u32 eng_clock, u32 mem_clock) in amdgpu_atombios_set_engine_dram_timings() argument
1181 if (mem_clock) in amdgpu_atombios_set_engine_dram_timings()
1182 args.sReserved.ulClock = cpu_to_le32(mem_clock & SET_CLOCK_FREQ_MASK); in amdgpu_atombios_set_engine_dram_timings()
/drivers/gpu/drm/radeon/
A Dradeon_atombios.c3043 uint32_t mem_clock) in radeon_atom_set_memory_clock() argument
3051 args.ulTargetMemoryClock = cpu_to_le32(mem_clock); /* 10 khz */ in radeon_atom_set_memory_clock()
3057 u32 eng_clock, u32 mem_clock) in radeon_atom_set_engine_dram_timings() argument
3069 if (mem_clock) in radeon_atom_set_engine_dram_timings()
3070 args.sReserved.ulClock = cpu_to_le32(mem_clock & SET_CLOCK_FREQ_MASK); in radeon_atom_set_engine_dram_timings()
3076 u32 mem_clock) in radeon_atom_update_memory_dll() argument
3081 args = cpu_to_le32(mem_clock); /* 10 khz */ in radeon_atom_update_memory_dll()
3087 u32 mem_clock) in radeon_atom_set_ac_timing() argument
3091 u32 tmp = mem_clock | (COMPUTE_MEMORY_PLL_PARAM << 24); in radeon_atom_set_ac_timing()
A Dradeon.h307 u32 eng_clock, u32 mem_clock);
341 u32 mem_clock);
343 u32 mem_clock);
1946 void (*set_memory_clock)(struct radeon_device *rdev, uint32_t mem_clock);
A Dradeon_asic.h42 void radeon_atom_set_memory_clock(struct radeon_device *rdev, uint32_t mem_clock);

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