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Searched refs:memclk (Results 1 – 5 of 5) sorted by relevance

/drivers/memory/
A Dpl353-smc.c24 struct clk *memclk; member
32 clk_disable(pl353_smc->memclk); in pl353_smc_suspend()
49 ret = clk_enable(pl353_smc->memclk); in pl353_smc_resume()
87 pl353_smc->memclk = devm_clk_get_enabled(&adev->dev, "memclk"); in pl353_smc_probe()
88 if (IS_ERR(pl353_smc->memclk)) in pl353_smc_probe()
89 return dev_err_probe(&adev->dev, PTR_ERR(pl353_smc->memclk), in pl353_smc_probe()
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
A Dvg_clk_mgr.c591 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[j].memclk; in vg_clk_mgr_helper_populate_bw_params()
596 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[j].memclk; in vg_clk_mgr_helper_populate_bw_params()
632 { .fclk = 400, .memclk = 400, .voltage = 2800 },
633 { .fclk = 400, .memclk = 400, .voltage = 2800 },
634 { .fclk = 400, .memclk = 400, .voltage = 2800 },
635 { .fclk = 400, .memclk = 400, .voltage = 2800 }
A Ddcn301_smu.h33 uint32_t memclk; member
/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
A Dsmu11_driver_if_vangogh.h115 uint32_t memclk; member
/drivers/gpu/drm/amd/pm/swsmu/smu11/
A Dvangogh_ppt.c547 *freq = clk_table->DfPstateTable[dpm_level].memclk; in vangogh_get_dpm_clk_limited()
2190 clock_table->MemClocks[i].Freq = table->DfPstateTable[i].memclk; in vangogh_get_dpm_clock_table()

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