| /drivers/gpu/drm/amd/display/dc/hpo/dcn31/ |
| A D | dcn31_hpo_dp_stream_encoder.c | 233 misc0 = misc0 | 0x2; // MISC0[2:1] = 01 in dcn31_hpo_dp_stream_enc_set_stream_attribute()
237 misc0 = misc0 | 0x4; // MISC0[2:1] = 10 in dcn31_hpo_dp_stream_enc_set_stream_attribute()
278 misc0 = misc0 | 0x20; // MISC0[7:5] = 001 in dcn31_hpo_dp_stream_enc_set_stream_attribute()
282 misc0 = misc0 | 0x40; // MISC0[7:5] = 010 in dcn31_hpo_dp_stream_enc_set_stream_attribute()
286 misc0 = misc0 | 0x60; // MISC0[7:5] = 011 in dcn31_hpo_dp_stream_enc_set_stream_attribute()
303 misc0 = misc0 | 0x8; /* bit3=1 */ in dcn31_hpo_dp_stream_enc_set_stream_attribute()
308 misc0 = misc0 | 0x8; /* bit3=1, bit4=0 */ in dcn31_hpo_dp_stream_enc_set_stream_attribute()
311 misc0 = misc0 | 0x2; /* bit2=0, bit1=1 */ in dcn31_hpo_dp_stream_enc_set_stream_attribute()
313 misc0 = misc0 | 0x4; /* bit2=1, bit1=0 */ in dcn31_hpo_dp_stream_enc_set_stream_attribute()
317 misc0 = misc0 | 0x18; /* bit3=1, bit4=1 */ in dcn31_hpo_dp_stream_enc_set_stream_attribute()
[all …]
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| /drivers/gpu/drm/amd/display/dc/dio/dcn401/ |
| A D | dcn401_dio_stream_encoder.c | 446 uint32_t misc0 = 0; in enc401_stream_encoder_dp_set_stream_attribute() local
605 misc0 = colorimetry_bpc << 5; in enc401_stream_encoder_dp_set_stream_attribute()
612 misc0 = misc0 | 0x8; /* bit3=1 */ in enc401_stream_encoder_dp_set_stream_attribute()
617 misc0 = misc0 | 0x8; /* bit3=1, bit4=0 */ in enc401_stream_encoder_dp_set_stream_attribute()
620 misc0 = misc0 | 0x2; /* bit2=0, bit1=1 */ in enc401_stream_encoder_dp_set_stream_attribute()
622 misc0 = misc0 | 0x4; /* bit2=1, bit1=0 */ in enc401_stream_encoder_dp_set_stream_attribute()
626 misc0 = misc0 | 0x18; /* bit3=1, bit4=1 */ in enc401_stream_encoder_dp_set_stream_attribute()
629 misc0 = misc0 | 0x2; /* bit2=0, bit1=1 */ in enc401_stream_encoder_dp_set_stream_attribute()
631 misc0 = misc0 | 0x4; /* bit2=1, bit1=0 */ in enc401_stream_encoder_dp_set_stream_attribute()
653 REG_SET(DP_MSA_COLORIMETRY, 0, DP_MSA_MISC0, misc0); in enc401_stream_encoder_dp_set_stream_attribute()
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| /drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_stream_encoder.c | 276 uint32_t misc0 = 0; in dce110_stream_encoder_dp_set_stream_attribute() local
382 misc0 = colorimetry_bpc << 5; in dce110_stream_encoder_dp_set_stream_attribute()
387 misc0 = misc0 | 0x0; in dce110_stream_encoder_dp_set_stream_attribute()
392 misc0 = misc0 | 0x8; /* bit3=1 */ in dce110_stream_encoder_dp_set_stream_attribute()
398 misc0 = misc0 | 0x8; /* bit3=1, bit4=0 */ in dce110_stream_encoder_dp_set_stream_attribute()
402 misc0 = misc0 | 0x2; /* bit2=0, bit1=1 */ in dce110_stream_encoder_dp_set_stream_attribute()
404 misc0 = misc0 | 0x4; /* bit2=1, bit1=0 */ in dce110_stream_encoder_dp_set_stream_attribute()
409 misc0 = misc0 | 0x18; /* bit3=1, bit4=1 */ in dce110_stream_encoder_dp_set_stream_attribute()
413 misc0 = misc0 | 0x2; /* bit2=0, bit1=1 */ in dce110_stream_encoder_dp_set_stream_attribute()
415 misc0 = misc0 | 0x4; /* bit2=1, bit1=0 */ in dce110_stream_encoder_dp_set_stream_attribute()
[all …]
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| /drivers/gpu/drm/amd/display/dc/dio/dcn10/ |
| A D | dcn10_stream_encoder.c | 254 uint32_t misc0 = 0; in enc1_stream_encoder_dp_set_stream_attribute() local
364 misc0 = colorimetry_bpc << 5; in enc1_stream_encoder_dp_set_stream_attribute()
371 misc0 = misc0 | 0x8; /* bit3=1 */ in enc1_stream_encoder_dp_set_stream_attribute()
376 misc0 = misc0 | 0x8; /* bit3=1, bit4=0 */ in enc1_stream_encoder_dp_set_stream_attribute()
379 misc0 = misc0 | 0x2; /* bit2=0, bit1=1 */ in enc1_stream_encoder_dp_set_stream_attribute()
381 misc0 = misc0 | 0x4; /* bit2=1, bit1=0 */ in enc1_stream_encoder_dp_set_stream_attribute()
385 misc0 = misc0 | 0x18; /* bit3=1, bit4=1 */ in enc1_stream_encoder_dp_set_stream_attribute()
388 misc0 = misc0 | 0x2; /* bit2=0, bit1=1 */ in enc1_stream_encoder_dp_set_stream_attribute()
390 misc0 = misc0 | 0x4; /* bit2=1, bit1=0 */ in enc1_stream_encoder_dp_set_stream_attribute()
412 REG_SET(DP_MSA_COLORIMETRY, 0, DP_MSA_MISC0, misc0); in enc1_stream_encoder_dp_set_stream_attribute()
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| /drivers/gpu/drm/xlnx/ |
| A D | zynqmp_dp.c | 279 u8 misc0; member
1227 config->misc0 &= ~ZYNQMP_DP_MAIN_STREAM_MISC0_COMP_FORMAT_MASK; in zynqmp_dp_set_format()
1232 config->misc0 |= ZYNQMP_DP_MAIN_STREAM_MISC0_COMP_FORMAT_RGB; in zynqmp_dp_set_format()
1263 config->misc0 &= ~ZYNQMP_DP_MAIN_STREAM_MISC0_BPC_MASK; in zynqmp_dp_set_format()
1267 config->misc0 |= ZYNQMP_DP_MAIN_STREAM_MISC0_BPC_6; in zynqmp_dp_set_format()
1270 config->misc0 |= ZYNQMP_DP_MAIN_STREAM_MISC0_BPC_8; in zynqmp_dp_set_format()
1273 config->misc0 |= ZYNQMP_DP_MAIN_STREAM_MISC0_BPC_10; in zynqmp_dp_set_format()
1276 config->misc0 |= ZYNQMP_DP_MAIN_STREAM_MISC0_BPC_12; in zynqmp_dp_set_format()
1279 config->misc0 |= ZYNQMP_DP_MAIN_STREAM_MISC0_BPC_16; in zynqmp_dp_set_format()
1284 config->misc0 |= ZYNQMP_DP_MAIN_STREAM_MISC0_BPC_8; in zynqmp_dp_set_format()
[all …]
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| /drivers/gpu/drm/bridge/cadence/ |
| A D | cdns-mhdp8546-core.c | 1701 misc0 = 0, misc1 = 0, pxl_repr, in cdns_mhdp_configure_video() local
1717 misc0 = DP_YCBCR_COEFFICIENTS_ITU709; in cdns_mhdp_configure_video()
1724 misc0 |= DP_COLOR_FORMAT_RGB; in cdns_mhdp_configure_video()
1728 misc0 |= DP_COLOR_FORMAT_YCbCr444 | DP_TEST_DYNAMIC_RANGE_CEA; in cdns_mhdp_configure_video()
1732 misc0 |= DP_COLOR_FORMAT_YCbCr422 | DP_TEST_DYNAMIC_RANGE_CEA; in cdns_mhdp_configure_video()
1743 misc0 |= DP_TEST_BIT_DEPTH_6; in cdns_mhdp_configure_video()
1747 misc0 |= DP_TEST_BIT_DEPTH_8; in cdns_mhdp_configure_video()
1751 misc0 |= DP_TEST_BIT_DEPTH_10; in cdns_mhdp_configure_video()
1755 misc0 |= DP_TEST_BIT_DEPTH_12; in cdns_mhdp_configure_video()
1759 misc0 |= DP_TEST_BIT_DEPTH_16; in cdns_mhdp_configure_video()
[all …]
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| /drivers/net/ethernet/qlogic/qed/ |
| A D | qed_mcp.c | 836 QED_MFW_SET_FIELD(load_req.misc0, LOAD_REQ_LOCK_TO, in __qed_mcp_load_req()
838 QED_MFW_SET_FIELD(load_req.misc0, LOAD_REQ_FORCE, in __qed_mcp_load_req()
840 QED_MFW_SET_FIELD(load_req.misc0, LOAD_REQ_FLAGS0, in __qed_mcp_load_req()
870 load_req.misc0, in __qed_mcp_load_req()
871 QED_MFW_GET_FIELD(load_req.misc0, LOAD_REQ_ROLE), in __qed_mcp_load_req()
872 QED_MFW_GET_FIELD(load_req.misc0, in __qed_mcp_load_req()
896 load_rsp.misc0, in __qed_mcp_load_req()
897 QED_MFW_GET_FIELD(load_rsp.misc0, LOAD_RSP_ROLE), in __qed_mcp_load_req()
898 QED_MFW_GET_FIELD(load_rsp.misc0, LOAD_RSP_HSI), in __qed_mcp_load_req()
905 QED_MFW_GET_FIELD(load_rsp.misc0, LOAD_RSP_ROLE); in __qed_mcp_load_req()
[all …]
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| A D | qed_mfw_hsi.h | 1006 u32 misc0; member
1027 u32 misc0; member
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| /drivers/gpu/drm/amd/amdgpu/ |
| A D | mmhub_v1_8.c | 779 u64 misc0; in mmhub_v1_8_aca_bank_parser() local
786 misc0 = bank->regs[ACA_REG_IDX_MISC0]; in mmhub_v1_8_aca_bank_parser()
796 ACA_REG__MISC0__ERRCNT(misc0)); in mmhub_v1_8_aca_bank_parser()
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| A D | jpeg_v5_0_1.c | 991 u64 misc0; in jpeg_v5_0_1_aca_bank_parser() local
998 misc0 = bank->regs[ACA_REG_IDX_MISC0]; in jpeg_v5_0_1_aca_bank_parser()
1008 ACA_REG__MISC0__ERRCNT(misc0)); in jpeg_v5_0_1_aca_bank_parser()
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| A D | jpeg_v4_0_3.c | 1386 u64 misc0; in jpeg_v4_0_3_aca_bank_parser() local
1393 misc0 = bank->regs[ACA_REG_IDX_MISC0]; in jpeg_v4_0_3_aca_bank_parser()
1403 ACA_REG__MISC0__ERRCNT(misc0)); in jpeg_v4_0_3_aca_bank_parser()
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| A D | vcn_v5_0_1.c | 1532 u64 misc0; in vcn_v5_0_1_aca_bank_parser() local
1539 misc0 = bank->regs[ACA_REG_IDX_MISC0]; in vcn_v5_0_1_aca_bank_parser()
1549 ACA_REG__MISC0__ERRCNT(misc0)); in vcn_v5_0_1_aca_bank_parser()
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| A D | vcn_v4_0_3.c | 2064 u64 misc0; in vcn_v4_0_3_aca_bank_parser() local
2071 misc0 = bank->regs[ACA_REG_IDX_MISC0]; in vcn_v4_0_3_aca_bank_parser()
2081 ACA_REG__MISC0__ERRCNT(misc0)); in vcn_v4_0_3_aca_bank_parser()
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| A D | sdma_v4_4_2.c | 2528 u64 misc0; in sdma_v4_4_2_aca_bank_parser() local
2535 misc0 = bank->regs[ACA_REG_IDX_MISC0]; in sdma_v4_4_2_aca_bank_parser()
2545 ACA_REG__MISC0__ERRCNT(misc0)); in sdma_v4_4_2_aca_bank_parser()
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| A D | gfx_v9_4_3.c | 858 u64 misc0; in gfx_v9_4_3_aca_bank_parser() local
871 misc0 = bank->regs[ACA_REG_IDX_MISC0]; in gfx_v9_4_3_aca_bank_parser()
881 ACA_REG__MISC0__ERRCNT(misc0)); in gfx_v9_4_3_aca_bank_parser()
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| /drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| A D | smu_v13_0_6_ppt.c | 3402 uint64_t status0, misc0; in mca_gfx_mca_get_err_count() local
3416 misc0 = entry->regs[MCA_REG_IDX_MISC0]; in mca_gfx_mca_get_err_count()
3417 *count = REG_GET_FIELD(misc0, MCMP1_MISC0T0, ErrCnt); in mca_gfx_mca_get_err_count()
3426 uint64_t status0, misc0; in mca_smu_mca_get_err_count() local
3442 misc0 = entry->regs[MCA_REG_IDX_MISC0]; in mca_smu_mca_get_err_count()
3443 *count = REG_GET_FIELD(misc0, MCMP1_MISC0T0, ErrCnt); in mca_smu_mca_get_err_count()
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