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Searched refs:misc_base (Results 1 – 6 of 6) sorted by relevance

/drivers/clk/spear/
A Dspear1340_clock.c19 #define SPEAR1340_SYS_CLK_CTRL (misc_base + 0x200)
26 #define SPEAR1340_PLL_CFG (misc_base + 0x210)
38 #define SPEAR1340_PLL1_CTR (misc_base + 0x214)
39 #define SPEAR1340_PLL1_FRQ (misc_base + 0x218)
40 #define SPEAR1340_PLL2_CTR (misc_base + 0x220)
41 #define SPEAR1340_PLL2_FRQ (misc_base + 0x224)
42 #define SPEAR1340_PLL3_CTR (misc_base + 0x22C)
43 #define SPEAR1340_PLL3_FRQ (misc_base + 0x230)
44 #define SPEAR1340_PLL4_CTR (misc_base + 0x238)
45 #define SPEAR1340_PLL4_FRQ (misc_base + 0x23C)
[all …]
A Dspear6xx_clock.c17 #define PLL1_CTR (misc_base + 0x008)
18 #define PLL1_FRQ (misc_base + 0x00C)
19 #define PLL2_CTR (misc_base + 0x014)
20 #define PLL2_FRQ (misc_base + 0x018)
21 #define PLL_CLK_CFG (misc_base + 0x020)
26 #define CORE_CLK_CFG (misc_base + 0x024)
33 #define PERIP_CLK_CFG (misc_base + 0x028)
47 #define PERIP1_CLK_ENB (misc_base + 0x02C)
73 #define PRSC0_CLK_CFG (misc_base + 0x044)
74 #define PRSC1_CLK_CFG (misc_base + 0x048)
[all …]
A Dspear3xx_clock.c20 #define PLL1_CTR (misc_base + 0x008)
21 #define PLL1_FRQ (misc_base + 0x00C)
22 #define PLL2_CTR (misc_base + 0x014)
23 #define PLL2_FRQ (misc_base + 0x018)
24 #define PLL_CLK_CFG (misc_base + 0x020)
29 #define CORE_CLK_CFG (misc_base + 0x024)
39 #define PERIP_CLK_CFG (misc_base + 0x028)
50 #define PERIP1_CLK_ENB (misc_base + 0x02C)
69 #define RAS_CLK_ENB (misc_base + 0x034)
82 #define PRSC0_CLK_CFG (misc_base + 0x044)
[all …]
A Dspear1310_clock.c19 #define SPEAR1310_PLL_CFG (misc_base + 0x210)
32 #define SPEAR1310_PLL1_CTR (misc_base + 0x214)
33 #define SPEAR1310_PLL1_FRQ (misc_base + 0x218)
34 #define SPEAR1310_PLL2_CTR (misc_base + 0x220)
35 #define SPEAR1310_PLL2_FRQ (misc_base + 0x224)
36 #define SPEAR1310_PLL3_CTR (misc_base + 0x22C)
37 #define SPEAR1310_PLL3_FRQ (misc_base + 0x230)
38 #define SPEAR1310_PLL4_CTR (misc_base + 0x238)
39 #define SPEAR1310_PLL4_FRQ (misc_base + 0x23C)
40 #define SPEAR1310_PERIP_CLK_CFG (misc_base + 0x244)
[all …]
/drivers/staging/gpib/agilent_82350b/
A Dagilent_82350b.h51 void __iomem *misc_base; member
A Dagilent_82350b.c679 a_priv->misc_base = ioremap(pci_resource_start(a_priv->pci_device, MISC_REGION), in agilent_82350b_generic_attach()
681 dev_dbg(board->gpib_dev, "misc base address remapped to 0x%p\n", a_priv->misc_base); in agilent_82350b_generic_attach()
758 if (a_priv->misc_base) in agilent_82350b_detach()
759 iounmap(a_priv->misc_base); in agilent_82350b_detach()

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