Home
last modified time | relevance | path

Searched refs:mmDP5_DP_DPHY_INTERNAL_CTRL (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/amd/display/dc/resource/dce100/
A Ddce100_resource.c73 #define mmDP5_DP_DPHY_INTERNAL_CTRL 0x4fa7 macro
/drivers/gpu/drm/amd/display/dc/resource/dce120/
A Ddce120_resource.c83 #define mmDP5_DP_DPHY_INTERNAL_CTRL 0x260f macro
/drivers/gpu/drm/amd/display/dc/resource/dce112/
A Ddce112_resource.c72 #define mmDP5_DP_DPHY_INTERNAL_CTRL 0x4fa7 macro
/drivers/gpu/drm/amd/display/dc/resource/dce60/
A Ddce60_resource.c77 #define mmDP5_DP_DPHY_INTERNAL_CTRL 0x4BDE macro
/drivers/gpu/drm/amd/display/dc/resource/dce80/
A Ddce80_resource.c74 #define mmDP5_DP_DPHY_INTERNAL_CTRL 0x4BDE macro
/drivers/gpu/drm/amd/display/dc/resource/dce110/
A Ddce110_resource.c78 #define mmDP5_DP_DPHY_INTERNAL_CTRL 0x4fa7 macro
/drivers/gpu/drm/amd/display/dc/resource/dcn10/
A Ddcn10_resource.c86 #define mmDP5_DP_DPHY_INTERNAL_CTRL 0x260f macro
/drivers/gpu/drm/amd/display/dc/resource/dcn20/
A Ddcn20_resource.c103 #define mmDP5_DP_DPHY_INTERNAL_CTRL 0x260f macro
/drivers/gpu/drm/amd/include/asic_reg/dcn/
A Ddcn_3_0_2_offset.h11273 #define mmDP5_DP_DPHY_INTERNAL_CTRL macro
A Ddcn_3_0_0_offset.h12425 #define mmDP5_DP_DPHY_INTERNAL_CTRL macro

Completed in 269 milliseconds