Searched refs:mmHDP_MEM_POWER_LS (Results 1 – 11 of 11) sorted by relevance
| /drivers/gpu/drm/amd/amdgpu/ |
| A D | hdp_v4_0.c | 92 def = data = RREG32(SOC15_REG_OFFSET(HDP, 0, mmHDP_MEM_POWER_LS)); in hdp_v4_0_update_clock_gating() 100 WREG32(SOC15_REG_OFFSET(HDP, 0, mmHDP_MEM_POWER_LS), data); in hdp_v4_0_update_clock_gating() 132 data = RREG32(SOC15_REG_OFFSET(HDP, 0, mmHDP_MEM_POWER_LS)); in hdp_v4_0_get_clockgating_state()
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| A D | si.c | 563 mmHDP_MEM_POWER_LS, 0x00000001, 0x00000001, 660 mmHDP_MEM_POWER_LS, 0x00000001, 0x00000001, 760 mmHDP_MEM_POWER_LS, 0x00000001, 0x00000001, 840 mmHDP_MEM_POWER_LS, 0x00000001, 0x00000001, 917 mmHDP_MEM_POWER_LS, 0x00000001, 0x00000001,
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| A D | gmc_v6_0.c | 744 orig = data = RREG32(mmHDP_MEM_POWER_LS); in gmc_v6_0_enable_hdp_ls() 752 WREG32(mmHDP_MEM_POWER_LS, data); in gmc_v6_0_enable_hdp_ls()
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| A D | vi.c | 1785 temp = data = RREG32(mmHDP_MEM_POWER_LS); in vi_update_hdp_light_sleep() 1793 WREG32(mmHDP_MEM_POWER_LS, data); in vi_update_hdp_light_sleep() 2011 data = RREG32(mmHDP_MEM_POWER_LS); in vi_common_get_clockgating_state()
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| A D | gmc_v7_0.c | 902 orig = data = RREG32(mmHDP_MEM_POWER_LS); in gmc_v7_0_enable_hdp_ls() 910 WREG32(mmHDP_MEM_POWER_LS, data); in gmc_v7_0_enable_hdp_ls()
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| /drivers/gpu/drm/amd/include/asic_reg/hdp/ |
| A D | hdp_4_0_offset.h | 56 #define mmHDP_MEM_POWER_LS 0x00d4 macro
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| /drivers/gpu/drm/amd/include/asic_reg/oss/ |
| A D | oss_1_0_d.h | 143 #define mmHDP_MEM_POWER_LS 0x0BD4 macro
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| A D | oss_2_4_d.h | 394 #define mmHDP_MEM_POWER_LS 0xbd4 macro
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| A D | oss_3_0_1_d.h | 515 #define mmHDP_MEM_POWER_LS 0xbd4 macro
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| A D | oss_2_0_d.h | 565 #define mmHDP_MEM_POWER_LS 0xbd4 macro
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| A D | oss_3_0_d.h | 610 #define mmHDP_MEM_POWER_LS 0xbd4 macro
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