Searched refs:mmSQ_EDC_INFO (Results 1 – 8 of 8) sorted by relevance
| /drivers/gpu/drm/amd/include/asic_reg/gc/ |
| A D | gc_9_4_1_offset.h | 166 #define mmSQ_EDC_INFO … macro
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| A D | gc_9_0_offset.h | 567 #define mmSQ_EDC_INFO … macro
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| A D | gc_9_1_offset.h | 561 #define mmSQ_EDC_INFO … macro
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| /drivers/gpu/drm/amd/amdgpu/ |
| A D | gfx_v9_4.c | 61 { SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_INFO), 0, 8, 16 },
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| A D | gfx_v8_0.c | 1467 mmSQ_EDC_INFO,
6673 sq_edc_source = REG_GET_FIELD(RREG32(mmSQ_EDC_INFO), SQ_EDC_INFO, SOURCE); in gfx_v8_0_parse_sq_irq()
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| A D | gfx_v9_0.c | 4553 { SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_INFO), 0, 4, 16},
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| /drivers/gpu/drm/amd/include/asic_reg/gca/ |
| A D | gfx_8_1_d.h | 2067 #define mmSQ_EDC_INFO 0x23a3 macro
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| A D | gfx_8_0_d.h | 2099 #define mmSQ_EDC_INFO 0x23a3 macro
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